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AM29F400BT-55SE 参数 Datasheet PDF下载

AM29F400BT-55SE图片预览
型号: AM29F400BT-55SE
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 256KX16, 55ns, PDSO44, MO-180AAA, SOP-44]
分类和应用: 光电二极管内存集成电路
文件页数/大小: 43 页 / 860 K
品牌: CYPRESS [ CYPRESS ]
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D A T A S H E E T  
COMMAND DEFINITIONS  
Writing specific address and data commands or  
sequences into the command register initiates device  
operations. Table 5 defines the valid register command  
sequences. Writing incorrect address and data  
values or writing them in the improper sequence  
resets the device to reading array data.  
however, the device ignores reset commands until the  
operation is complete.  
The reset command may be written between the  
sequence cycles in an autoselect command sequence.  
Once in the autoselect mode, the reset command must  
be written to return to reading array data (also applies  
to autoselect during Erase Suspend).  
All addresses are latched on the falling edge of WE# or  
CE#, whichever happens later. All data is latched on  
the rising edge of WE# or CE#, whichever happens  
first. Refer to the appropriate timing diagrams in the  
“AC Characteristics” section.  
If DQ5 goes high during a program or erase operation,  
writing the reset command returns the device to  
reading array data (also applies during Erase  
Suspend).  
Reading Array Data  
Autoselect Command Sequence  
The device is automatically set to reading array data  
after device power-up. No commands are required to  
retrieve data. The device is also ready to read array  
data after completing an Embedded Program or  
Embedded Erase algorithm.  
The autoselect command sequence allows the host  
system to access the manufacturer and devices codes,  
and determine whether or not a sector is protected.  
Table 5 shows the address and data requirements. This  
method is an alternative to that shown in Table 4, which  
After the device accepts an Erase Suspend command,  
the device enters the Erase Suspend mode. The  
system can read array data using the standard read  
timings, except that if it reads at an address within  
erase-suspended sectors, the device outputs status  
data. After completing a programming operation in the  
Erase Suspend mode, the system may once again  
read array data with the same exception. See “Erase  
Suspend/Erase Resume Commands” for more infor-  
mation on this mode.  
is intended for PROM programmers and requires V  
on address bit A9.  
ID  
The autoselect command sequence is initiated by  
writing two unlock cycles, followed by the autoselect  
command. The device then enters the autoselect  
mode, and the system may read at any address any  
number of times, without initiating another command  
sequence.  
A read cycle at address XX00h or retrieves the manu-  
facturer code. A read cycle at address XX01h in word  
mode (or 02h in byte mode) returns the device code. A  
read cycle containing a sector address (SA) and the  
address 02h in word mode (or 04h in byte mode)  
returns 01h if that sector is protected, or 00h if it is  
unprotected. Refer to Tables 2 and 3 for valid sector  
addresses.  
The system must issue the reset command to re-  
enable the device for reading array data if DQ5 goes  
high, or while in the autoselect mode. See the “Reset  
Command” section, next.  
See also “Requirements for Reading Array Data” in the  
“Device Bus Operations” section for more information.  
The Read Operations table provides the read parame-  
ters, and Figure 9 shows the timing diagram.  
The system must write the reset command to exit the  
autoselect mode and return to reading array data.  
Reset Command  
Writing the reset command to the device resets the  
device to reading array data. Address bits are don’t  
care for this command.  
Word/Byte Program Command Sequence  
The system may program the device by word or byte,  
depending on the state of the BYTE# pin. Program-  
ming is a four-bus-cycle operation. The program  
command sequence is initiated by writing two unlock  
write cycles, followed by the program set-up command.  
The program address and data are written next, which  
in turn initiate the Embedded Program algorithm. The  
system is not required to provide further controls or tim-  
ings. The device automatically provides internally  
generated program pulses and verify the programmed  
cell margin. Table 5 shows the address and data  
requirements for the byte program command  
sequence.  
The reset command may be written between the  
sequence cycles in an erase command sequence  
before erasing begins. This resets the device to reading  
array data. Once erasure begins, however, the device  
ignores reset commands until the operation is  
complete.  
The reset command may be written between the  
sequence cycles in a program command sequence  
before programming begins. This resets the device to  
reading array data (also applies to programming in  
Erase Suspend mode). Once programming begins,  
When the Embedded Program algorithm is complete,  
the device then returns to reading array data and  
November 11, 2009 21505E8  
Am29F400B  
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