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AM29F002BB-90JI 参数 Datasheet PDF下载

AM29F002BB-90JI图片预览
型号: AM29F002BB-90JI
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 256KX8, 90ns, PQCC32, PLASTIC, MO-052AAE, LCC-32]
分类和应用:
文件页数/大小: 40 页 / 1039 K
品牌: CYPRESS [ CYPRESS ]
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D A T A S H E E T  
Sector protection/unprotection must be implemented  
using programming equipment. The procedure  
Hardware Data Protection  
The command sequence requirement of unlock cycles  
for programming or erasing provides data protection  
against inadvertent writes (refer to the Command Defi-  
nitions table). In addition, the following hardware data  
protection measures prevent accidental erasure or pro-  
gramming, which might otherwise be caused by  
requires a high voltage (V ) on address pin A9 and the  
ID  
control pins. Details on this method are provided in the  
supplements, publication numbers 20819  
(Am29F002B) and 21183 (Am29F002NB). Contact an  
AMD representative to obtain a copy of the appropriate  
document.  
spurious system level signals during V power-up and  
CC  
The device is shipped with all sectors unprotected.  
AMD offers the option of programming and protecting  
sectors at its factory prior to shipping the device  
through AMD’s ExpressFlash™ Service. Contact an  
AMD representative for details.  
power-down transitions, or from system noise.  
Low V  
Write Inhibit  
CC  
When V  
is less than V  
, the device does not  
LKO  
CC  
accept any write cycles. This protects data during V  
power-up and power-down. The command register and  
all internal program/erase circuits are disabled, and the  
CC  
It is possible to determine whether a sector is protected  
or unprotected. See “Autoselect Mode” for details.  
device resets. Subsequent writes are ignored until V  
CC  
is greater than V  
proper signals to the control pins to prevent uninten-  
. The system must provide the  
LKO  
Temporary Sector Unprotect  
Note: This feature requires the RESET# pin and is  
tional writes when V is eater than V  
.
CC  
LKO  
therefore not available on the Am29F002NB.  
Write Pulse “Glitch” Protection  
This feature allows temporary unprotection of previ-  
ously protected sectors to change data in-system. The  
Sector Unprotect mode is activated by setting the  
Noise pulses of lthan 5 ns (typical) on OE#, CE# or  
WE# do not initiate a write cycle.  
Logical Inibit  
RESET# pin to V . During this mode, formerly pro-  
ID  
tected sectors can be programmed or erased by  
Write cycles are inhibited by holding any one of OE# =  
V , CE# = V or WE# = V . To initiate a write cycle,  
selecting the sector addresses. Once V is removed  
ID  
IL  
IH  
IH  
from the RESET# pin, all the previously protected  
sectors are protected again. Figure 1 shows the algo-  
rithm, and the Temporary Sector Unprotect diagram  
shows the timing waveforms, for this feature.  
CE# and WE# must be a logical zero while OE# is a  
logical one.  
Power-Up Write Inhibit  
If WE# = CE# = V and OE# = V during power up, the  
IL  
IH  
device does not accept commands on the rising edge  
of WE#. The internal state machine is automatically  
reset to reading array data on power-up.  
START  
RESET# = VID  
(Note 1
PerforErase or  
Program Operations  
RESET# = VIH  
Temporary Sector  
Unprotect  
Completed (Note 2)  
Notes:  
1. All protected sectors unprotected.  
2. All previously protected sectors are protected once  
again.  
Figure 1. Temporary Sector Unprotect Operation  
November 17, 2009 21527D8  
Am29F002B/Am29F002NB  
11