CY7C4282V
CY7C4292V
Switching Waveforms (continued)
Programmable Almost Empty Flag Timing
t
t
CLKL
CLKH
WCLK
t
t
ENS ENH
WEN
PAE
18
Note
N + 1 WORDS
IN FIFO
19
Note
t
PAE
[17]
t
t
PAE
SKEW2
RCLK
REN
t
ENS
t
t
ENS ENH
4282V–12
Programmable Almost Full Flag Timing
20
Note
t
t
CLKL
CLKH
WCLK
t
t
ENS ENH
WEN
t
PAF
FULL M WORDS
−
IN FIFO[21]
PAF
FULL (M+1)WORDS
−
IN FIFO
[22]
t
t
PAF
SKEW2
RCLK
REN
t
ENS
t
t
ENS ENH
4282V–13
Notes:
17. SKEW2 is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of WCLK and the
t
rising RCLK is less than tSKEW2, then PAE may not change state until the next RCLK.
18. PAE offset= n.
19. If a read is performed on this rising edge of the read clock, there will be Empty + (n−1) words in the FIFO when PAEgoes LOW
20. If a write is performed on this rising edge of the write clock, there will be Full − (m−1) words of the FIFO when PAF goes LOW.
21. 64K − m words for CY7C4282V, 128K − m words for CY4292V.
22. tSKEW2 is the minimum time between a rising RCLK edge and a rising WCLK edge for PAF to change during that clock cycle. If the time between the rising edge of RCLK
and the rising edge of WCLK is less than tSKEW2, then PAF may not change state until the next WCLK.
9
CYPRESS [ CYPRESS ]
