CY7C372i
Switching Characteristics
Over the Operating Range
[14]
7C372i-125
Parameter
t
PD
t
PDL
t
PDLL
t
EA
t
ER
t
WL
t
WH
t
IS
t
IH
t
ICO
t
ICOL
Description
Input to Combinatorial Output
[1]
Input to Output Through Transparent Input or
Output Latch
[1]
Input to Output Through Transparent Input and
Output Latches
[1]
Input to Output Enable
[1]
Input to Output Disable
Clock or Latch Enable Input LOW Time
[9]
Clock or Latch Enable Input HIGH Time
Input Register or Latch Set-Up Time
Input Register or Latch Hold Time
Input Register Clock or Latch Enable to
Combinatorial Output
[1]
Input Register Clock or Latch Enable to Output
Through Transparent Output Latch
[1]
Clock or Latch Enable to Output
[1]
Set-Up Time from Input to Clock or Latch Enable
Register or Latch Data Hold Time
Output Clock or Latch Enable to Output Delay
(Through Memory Array)
[1]
Output Clock or Latch Enable to Output Clock
or Latch Enable (Through Memory Array)
Set-Up Time from Input Through Transparent
Latch to Output Register Clock or Latch Enable
Hold Time for Input Through Transparent Latch
from Output Register Clock or Latch Enable
Maximum Frequency with Internal Feedback in
Output Registered Mode (Least of 1/t
SCS
,
1/(t
S
+ t
H
), or 1/t
CO
)
[9]
Maximum Frequency Data Path in Output
Registered/Latched Mode (Lesser of 1/(t
WL
+
t
WH
), 1/(t
S
+ t
H
), or 1/t
CO
)
[9]
Maximum Frequency with External Feedback
(Lesser of 1/(t
CO
+ t
S
) and 1/(t
WL
+ t
WH
))
[9]
Output Data Stable from Output clock Minus
Input Register Hold Time for 7C37x
[9, 15]
Input Register Clock to Output Register Clock
Maximum Frequency in Pipelined Mode (Least
of 1/(t
CO
+ t
IS
), 1/t
ICS
, 1/(t
WL
+ t
WH
), 1/(t
IS
+ t
IH
), or
1/t
SCS
)
[9]
8
10
0
125
5.5
0
14
10
12
0
100
[9]
7C372i-100
Min.
Max.
12
15
16
16
16
3
3
2
2
7C372i-83
7C372iL-83
Min.
Max.
15
18
19
19
19
4
4
3
3
7C372i-66
7C372iL-66
Min.
Max.
20
22
24
24
24
5
5
4
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
24
26
ns
ns
Min.
Max.
10
13
15
14
14
Combinatorial Mode Parameters
Input Registered/Latched Mode Parameters
3
3
2
2
14
16
16
18
19
21
Output Registered/Latched Mode Parameters
t
CO
t
S
t
H
t
CO2
t
SCS
t
SL
t
HL
f
MAX1
6.5
6
0
16
12
15
0
83
6.5
8
0
19
15
20
0
66
8
10
0
24
10
ns
ns
ns
ns
ns
ns
ns
MHz
f
MAX2
153.8
153.8
125
100
MHz
f
MAX3
t
OH
-t
IH
37x
t
ICS
f
MAX4
83.3
0
80
0
62.5
0
50
0
MHz
ns
Pipelined Mode Parameters
8
125
10
100
12
83.3
15
66.6
ns
MHz
Notes:
14. All AC parameters are measured with 16 outputs switching and 35-pF AC Test Load.
15. This specification is intended to guarantee interface compatibility of the other members of the CY7C370i family with the CY7C372i. This specification is met for
the devices operating at the same ambient temperature and at the same power supply voltage.
Document #: 38-03033 Rev. *A
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