欢迎访问ic37.com |
会员登录 免费注册
发布采购

7C1351-40 参数 Datasheet PDF下载

7C1351-40图片预览
型号: 7C1351-40
PDF下载: 下载PDF文件 查看货源
内容描述: 128Kx36流通型SRAM与NOBL TM架构 [128Kx36 Flow-Through SRAM with NoBL TM Architecture]
分类和应用: 静态存储器
文件页数/大小: 13 页 / 185 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
 浏览型号7C1351-40的Datasheet PDF文件第2页浏览型号7C1351-40的Datasheet PDF文件第3页浏览型号7C1351-40的Datasheet PDF文件第4页浏览型号7C1351-40的Datasheet PDF文件第5页浏览型号7C1351-40的Datasheet PDF文件第7页浏览型号7C1351-40的Datasheet PDF文件第8页浏览型号7C1351-40的Datasheet PDF文件第9页浏览型号7C1351-40的Datasheet PDF文件第10页  
CY7C1351
Interleaved Burst Sequence
First
Address
Ax+1, Ax
00
01
10
11
Second
Address
Ax+1, Ax
01
00
11
10
Third
Address
Ax+1, Ax
10
11
00
01
Fourth
Address
Ax+1, Ax
11
10
01
00
Linear Burst Sequence
First
Address
Ax+1, Ax
00
01
10
11
Second
Address
Ax+1, Ax
01
10
11
00
Third
Address
Ax+1, Ax
10
11
00
01
Fourth
Address
Ax+1, Ax
11
00
01
10
Write Cycle Description
[1, 2]
Function
Read
Write
No bytes written
Write Byte 0
(DQ
[7:0]
and DP
0
)
Write Byte 1 – (DQ
[15:8]
and DP
1
)
Write Bytes 1, 0
Write Byte 2
(DQ
[23:16]
and DP
2
)
Write Bytes 2, 0
Write Bytes 2, 1
Write Bytes 2, 1, 0
Write Byte 3
(DQ
[31:24]
and DP
3
)
Write Bytes 3, 0
Write Bytes 3, 1
Write Bytes 3, 1, 0
Write Bytes 3, 2
Write Bytes 3, 2, 0
Write Bytes 3, 2, 1
Write All Bytes
WE
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BWS
3
X
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
BWS
2
X
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
BWS
1
X
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
BWS
0
X
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
6