RS8953B/8953SPB
4.0 Registers
HDSL Channel Unit
4.15 PRA Transmit Read
AIS
Enables to override all 32 slots of an PCM frame except Slot 0, transmitted towards the HDSL
link, with a constant pattern:
0 = Disable (Normal)
1 = 0xFF
AIS must be activated with reset_e_cnt = 1
NOTE:
AIS enables to achieve framed AIS. To achieve unframed arbitrary AUX pattern
generation, use the existing feature of the channel unit.
RST_E_CNT
Clears the TX_E counter, as follows:
0 = Counter enabled
1 = Clear the E-transmit counter
The value of this register takes effect starting with the next PCM multiframe
NOTE:
following the write access cycle completion.
0x42—PRA Transmit Monitor Register 1 (TX _PRA_MON1)
7
6
5
4
3
2
1
0
Sa _4
Sa _3
Sa _2
Sa _1
Sa
A
E2
E1
6
6
6
6
5
This register is updated once every PCM multiframe. The bits in this register correspond to the bits in the
transmitted PCM multiframe stream, in the PCM to HDSL direction.
Sa6 _1, _2, _3, _4 Sa6 _1, _2, _3, _4 is updated only if the same Sa6 pattern is detected in the second
submultiframe and synchr_en = 0.
Sa5
A
Sa5 is only updated if all 8 corresponding bits of the multiframe were detected as identical.
A-bit is only updated if all 8 corresponding bits of the multiframe were detected as identical.
E1is the E-bit detected in Frame 13.
E1
E2
E2 is the E-bit detected in Frame 15.
0x43—PRA Transmit E-Bits Counter (TX _PRA_E_CNT)
7
6
5
4
3
2
1
0
TX_PRA_E_CNT[7:0]
The register is update twice in an PCM multiframe. It increments each time one of the E-bits is detected
active 0.
The counter wraps around at 255. It is cleared or enabled by RESET_E_CNT of TX_PRA_CTRL1 register.
0x45—PRA Transmit In-Band Code (TX_PRA_CODE)
7
6
5
4
3
2
1
0
Sa _4
Sa _3
Sa _2
Sa _1
S 5
—
—
A
6
6
6
6
a
N8953BDSB
Conexant
4-67
CONEXANT [ CONEXANT SYSTEMS, INC ]
