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Label
I/O Type
Signal Name/Description
DTE SERIAL INTERFACE
Timing, data, control, and status signals provide a V.24-compatible serial interface. These signals are TTL compatible in order to drive the
short wire lengths and circuits normally found within a printed circuit board, stand-alone modem enclosures, or equipment cabinets. For
driving longer cables, these signals can be easily converted to EIA/RS-232-D voltage levels.
TXD
IA
Transmitted Data. The MDP obtains serial data to be transmitted from the local DTE on the Transmitted Data
(TXD) input.
RXD
OA
IA
Received Data. The MDP presents received serial data to the local DTE on the Received Data (RXD) output.
~RTS
Request to Send. Activating ~RTS causes the MDP to transmit data on TXD when ~CTS becomes active. The
~RTS pin is logically ORed with the RTS bit.
~CTS
OA
OA
Clear To Send. ~CTS active indicates to the local DTE that the MDP will transmit any data present on TXD.
CTS response times from an active condition of RTS are shown in Table 3.
~RLSD
Received Line Signal Detector. ~RLSD active indicates to the local DTE that energy above the receive level
threshold is present on the receiver input, and that the energy is not a training sequence.
One of four ~RLSD receive level threshold options can be selected (RTH bits). A minimum hysteresis action of
2 dB exists between the actual off-to-on and on-to-off transition levels. The threshold level and hysteresis action
are measured with a modulated signal applied to the Receiver Analog (RXA) input. Note that performance may
be degraded when the received signal level is less than -43 dBm. The ~RLSD on and off thresholds are host
programmable in DSP RAM.
~DTR
IA
Data Terminal Ready. In V.8, V.90, K56flex, V.34, V.32 bis, V.32, V.22 bis, V.22, or Bell 212A configuration,
activating ~DTR initiates the handshake sequence. The DATA bit must be set to complete the handshake.
In V.21, V.23, or Bell 103 configuration, activating ~DTR causes the MDP to enter the data state provided that
the DATA bit is a 1. If in answer mode, the MDP immediately sends answer tone. In these modes, if controlled
carrier is enabled, carrier is controlled by RTS.
During the data mode, deactivating ~DTR causes the transmitter and receiver to turn off and return to the idle
state.
The ~DTR input and the DTR control bit are logically ORed.
~DSR
OA
Data Set Ready. ~DSR ON indicates that the MDP is in the data transfer state. ~DSR OFF indicates that the
DTE is to disregard all signals appearing on the interchange circuits except Ring Indicator (~RI). ~DSR is OFF
when the MDP is in a test mode (i.e., local analog or remote digital loopback).
The DSR status bit reflects the state of the ~DSR output.
~RI
OA
OA
IA
Ring Indicator. ~RI output follows the ringing signal present on the line with a low level (0 V) during the ON
time, and a high level during the OFF time coincident with the ringing signal. The RI status bit reflects the state
of the ~RI output.
TDCLK
XTCLK
~RDCLK
Transmit Data Clock. The MDP outputs a synchronous Transmit Data Clock (TDCLK) for USRT timing. The
TDCLK frequency is the data rate (±0.01%) with a duty cycle of 50±1%. The TDCLK source can be internal,
external (input on XTCLK), or slave (to ~RDCLK) as selected by TXCLK bits in interface memory.
External Transmit Clock. In synchronous communication, an external transmit data clock can be connected to
the MDP XTCLK input. The clock supplied at XTCLK must exhibit the same characteristics as TDCLK. The
XTCLK input is then reflected at the TDCLK output.
OA
Receive Data Clock. The MDP outputs a synchronous Receive Data Clock (~RDCLK) for USRT timing. The
~RDCLK frequency is the data rate (±0.01%) with a duty cycle of 50±1%. The ~RDCLK low-to-high transitions
coincide with the center of the received data bits.
CONEXANT [ CONEXANT SYSTEMS, INC ]
