CX28331/CX28332/CX28333
1.0 Pin Description
Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit
1.1 Pin Assignments
Table 1-1. CX2833i-1x Pin Definitions (5 of 6)
Pin #
Signal Name
Description
I/O/P
Notes
CX28331-1x CX28332-1x CX28333-1x
46
—
—
—
70
31
—
70
46
REQH
REQH1
REQH2
Ch1 Receive High EQ
Gain Enable
I
The equalizer in the CX2833i has
two gain settings. The higher gain
setting is designed to optimally
equalize a nominally-shaped (meets
the pulse template), pulse-driven
DS3 or STS-1 waveform that is
driven through 0–900 feet of cable.
Square-shaped pulses such as E3
or DS3-HIGH require less
Ch2 Receive High EQ
Gain Enable
—
—
31
REQH3
Ch3 Receive High EQ
Gain Enable
I
high-frequency gain and should use
the low EQ gain setting.
REQH = 1 high EQ gain
(DS3/STS-1 modes)
REQH = 0 low EQ gain (E3/DS3
Square Modes)
Power/Ground
12
—
—
—
9
—
4
—
4
TVDD
TVDD1
TVDD2
TVDD3
TVSS
TX power Ch1
P
Power pins for transmit circuitry
per channel (3.3 V).
20
—
—
1
12
20
—
1
TX power Ch2
TX power Ch3
TX ground Ch1
P
P
P
Ground pins for transmit circuitry
per channel.
—
—
—
13
—
—
—
16
—
—
—
60
TVSS1
TVSS2
TVSS3
RVDD
RVDD1
RVDD2
RVDD3
RVSS
17
—
—
5
9
TX ground Ch2
TX ground Ch3
RX power Ch1
P
P
P
17
—
5
Power pins for receive circuitry per
channel (3.3 V).
21
—
—
8
13
21
—
8
RX power Ch2
RX power Ch3
RX ground Ch1
P
P
P
Connect to 3.3 V power.
Ground pins for receive circuitry
per channel.
RVSS1
RVSS2
RVSS3
DVDDC
24
—
60
16
24
60
RX ground Ch2
RX ground Ch3
Digital core power
P
P
P
Connect to ground.
Digital core power for all channels
(3.3 V).
41
79
41
79
41
79
DVSSC
VGG
Digital core ground
5 V/3.3 V ESD pin (1)
P
P
Digital core ground for all channels.
5 V supply for 5 V-tolerant, digital
pad ESD diodes. No static power is
drawn from pin.
73
28
73
28
73
28
DVDDIO
DVSSIO
Digital I/O power
Digital ground
P
P
Connect to 3.3 V digital power.
Digital ground.
100985A
Conexant
1-9