1.0 Functional Description
CX25870/871
1.3 Device Description
Flicker-Free Video Encoder with Ultrascale Technology
1.3.26 Subcarrier Generation
The device uses a 32-bit-word to synthesize the subcarrier. The value of the
subcarrier increment required to generate the desired subcarrier frequency is
found with the following equations:
NTSC:
MSC[31:0] = int((455/(2*H_CLKO)) *232 + 0.5)
PAL:
MSC[31:0] = int((1135+1/625)/H_CLKO)*232 + 0.5
SECAM:
MSC_DB[31:0] = int((272/(2*H_CLKO)*232 + 0.5)
MSC_DR[31:0] = int((272/(2*H_CLKO)*232 + 0.5)
where:H_CLKO is the number of output clocks/line (this is register 0x76 and the
low nibble of 0x86).
This allows the generation of any desired subcarrier for any desired video
standard. The 32-bit subcarrier increment must be loaded by the serial interface
before the subcarrier is enabled. The device is reset to disable chroma until the
last byte of the 32-bit increment loads, at which time the chroma is enabled,
unless the DCHROMA bit is set.
In order to prevent any residual errors from accumulating, the subcarrier DTO
(Discrete Time Oscillator) is reset every four fields for NTSC formats and every
eight fields for PAL formats. For best quality in SECAM, the DIS_SCRST bit
should be set preventing a subcarrier phase reset at the beginning of each color
field sequence. Furthermore, the SECAM subcarrier is generated on lines 23-310
and 336-623 automatically unless disabled by the PROG_SC bit.
1.3.27 Subcarrier Phase Reset/Offset
In order to maintain correct SC-H phasing, the subcarrier phase is set to 0 degrees
on the leading edge of the analog vertical sync every four (NTSC) or eight (PAL)
fields, unless the DIS_SCRST (bit four of register 0xA2) is set to a logical 1. This
is true for both interlaced and noninterlaced outputs. The subcarrier phase can be
adjusted from the nominal 0 degrees phase by the PHASE_OFF[7:0] register,
where each LSB change corresponds to a 360/256 = 1.406 degrees change in the
phase.
Setting DIS_SCRST to 1 may be useful in situations where the ratio of CLK/2
to HSYNC* edges in a color frame is noninteger, which could produce a
significant phase impulse by resetting to 0.
1-52
Conexant
100381B
CONEXANT [ CONEXANT SYSTEMS, INC ]
