CX25870/871
Appendix E HDTV Output Mode
Flicker-Free Video Encoder with Ultrascale Technology
E.9 HDTV Output Mode Register and Bit Definitions
E.9 HDTV Output Mode Register and Bit
Definitions
Table E-6. Register Bitmap for HDTV-Specific Registers
8-Bit
Address
D7
D6
D5
D4
D3
D2
D1
D0
2E
HDTV_EN*
RGB2YPRPB* RPR_SYNC
_DIS*
GY_SYNC_
DIS*
BPB_SYNC_
DIS*
HD_SYNC_
EDGE*
RASTER_SEL[1:0]*
32
AUTO_CHK
DRVS[1:0]
SETUP_
HOLD_ADJ
IN_MODE[3] DATDLY_RE OFFSET_RG CSC_
B* SEL*
NOTE(S):
* = HDTV-specific bits
Table E-7. CX25870/871 Registers 0x2E & 0x32–HDTV Output Mode Bit Descriptions (1 of 2)
Bit/Register Names
Bit/Register Definition
HDTV_EN
Enable HDTV Output Mode. OUT_MODE[1:0] register bits must be set to 11(VGA Mode).
0 = Enables VGA mode. DACs will output analog R, G, B with standard bilevel(–40 IRE) analog syncs.
(DEFAULT)
1 = Enables HDTV Output mode. DACs will output HDTV compatible R/G/B or component video (Y/PR/PB)
outputs. Trilevel syncs and vertical synchronizing/broad pulses will be inserted automatically if
RASTER_SEL[1:0] = nonzero.
Note: EN_SCART bit must be 0 for HDTV Output Mode to be functional.
RGB2YPRPB
HDTV output switching bit. This bit is only effective when HDTV_EN = 1 and IN_MODE[3:0] = an RGB Input
format.
0 = Digital RGB Input to Analog HDTV RGB Output (DEFAULT)
1 = Digital RGB Input to Analog HDTV YPRPB Output
RPR_SYNC_DIS
GY_SYNC_DIS
BPB_SYNC_DIS
HD_SYNC_EDGE
0 = Enables trilevel sync on Red or PR output. (DEFAULT)
1 = Disables trilevel sync on Red or PR output. This bit will have to be set manually for EIA-770.3 compliance.
0 = Enables trilevel sync on Green or Y output. (DEFAULT)
1 = Disables trilevel sync on Green or Y output
0 = Enables trilevel sync on Blue or PB output. (DEFAULT)
1 = Disables trilevel sync on Blue or PB output. This bit will have to be set manually for EIA-770.3 compliance.
This bit is only effective when HDTV_EN = 1 and RASTER_SEL is nonzero.
0 = Trilevel sync edges transition time is equal to 4 input clocks. (DEFAULT)
1 = Trilevel sync edges transition time is equal to 2 input clocks.
RASTER_SEL[1:0]
This bit is only effective when HDTV_EN = 1.
00 = Device does not generate trilevel sync automatically in HDTV output mode. Trilevel sync periods dictated
by active HSYNC* input signal (as HIGHSYNC) and active VSYNC* input signal (as LOWSYNC). (DEFAULT)
01 = Bilevel sync generation for 480P format
10 = Trilevel sync generation for 720P format
11 = Trilevel sync generation for 1080i format
100381B
Conexant
E-15
CONEXANT [ CONEXANT SYSTEMS, INC ]
