CX25870/871
Appendix C Autoconfiguration Mode Register Values and Details
Flicker-Free Video Encoder with Ultrascale Technology
Table C-5. CX25870/871 Register Values for Autoconfiguration Modes 22–26 (2 of 2)
Autoconfiguration Mode #
22
23
24
25
26
0x8A
0x8C
98
49
0C
EE
5E
58
3A
B7
5D
1B
7F
17
0A
E5
74
78
43
85
00
00
00
1A
B6
83
03
07
6D
58
3B
AE
97
72
5C
10
24
F0
57
80
48
8C
01
04
D5
1E
1D
23
0C
0D
4C
90
36
00
50
2E
BA
0E
0A
E5
75
78
43
85
95
81
A7
1B
19
9B
0D
F4
40
90
35
9A
49
00
80
0E
24
F0
57
80
48
8C
97
1A
CA
22
92
7F
04
B1
73
00
3F
9A
A9
5D
74
1D
0A
E5
74
77
43
85
2F
A1
BD
14
0x8E
0x90
0x92
0x94
0x96
0x98
0x9A
0x9C
0x9E
0xA0
0xA2
0xA4
0xA6
0xA8
0xAA
0xAC
0xAE
0xB0
0xB2
0xB4
NOTE(S):
1. RGB digital input denotes that the CX25870/871 will be configured to receive the RGB default pixel input mode after an
autoconfiguration command, which is 24-bit, RGB-multiplexed (i.e., IN_MODE[3:0] = 0000). If the desired RGB pixel input
mode is NOT 24-bit RGB multiplexed, the CX25870/871's IN_MODE[3:0] bits must be programmed to the desired RGB pixel
input mode immediately before initiating a write to the CONFIG[5:0] bits.
2. YCrCb digital input denotes that the CX25870/871 will be configured to receive YCrCb pixel data after an autoconfiguration
command. The CX25870/871's IN_MODE[3:0] bits must be programmed to the desired YCrCb pixel input mode immediately
before initiating a write to the CONFIG[5:0] bits.
3. CX25870/871 registers not listed in this table (including IN_MODE[3:0]) do not get reprogrammed as a result of an
autoconfiguration command.
4. Pixel or Character signifies that this overscan ratio is acceptable for 8-clock per character graphics controllers or pixel-clock
controllers.
5. The CX25870/871 will be in master interface immediately after any autoconfiguration mode EXCEPT Mode 28 and Mode 29.
6. Mode 44 would ideally have 858 clocks per line. However, since 858 is not a multiple of 8, then 880 clocks per line was
utilized instead.
7. These autoconfiguration values assume a 13.500 MHz crystal resides between the XTALIN and XTALOUT pins. If the
14318_XTAL bit is set, then these autoconfiguration values will automatically change to reflect the presence of a 14.318 MHz
crystal.
100381B
Conexant
C-11
CONEXANT [ CONEXANT SYSTEMS, INC ]
