1.0 Functional Description
CX25870/871
1.1 Pin Descriptions
Flicker-Free Video Encoder with Ultrascale Technology
Aside from pins 2, 3, 65, 66, and 67, which are no connects within the
Bt868/869, the CX25870/871 is completely pin-to-pin compatible with
Conexant’s first generation VGA encoder.
Table 1-1. Pin Assignments (1 of 3)
Pin Name
VAA_VREF
I/O
Pin #
80
Description
—
Analog power. All VAA and VDD pins must be connected together on the same
PCB plane to prevent latchup.
AGND
—
79
78
77
Analog ground. All AGND and VSS pins must be connected together on the
same PCB plane to prevent latchup.
FSADJUST
VBIAS
I
Full-scale adjust control pin. A resistor (RSET) connected between this pin and
GND controls the full-scale output current on the analog outputs.
O
O
O
DAC bias voltage. A 0.1 µF ceramic capacitor must be used to bypass this pin to
GND. The capacitor must be as close to the device as possible to keep lead
lengths to an absolute minimum.
VREF
76
75
73
Voltage reference pin. A 1.0 µF ceramic capacitor must be used to decouple this
pin to GND. The decoupling capacitor must be as close to the device as possible
to keep lead lengths to an absolute minimum.
COMP
Compensation pin. A 0.1 µF ceramic capacitor must be used to bypass this pin
to VAA. The capacitor must be as close to the device as possible to keep lead
lengths to an absolute minimum.
VAA_DACC
—
—
—
—
DACC Analog power. All VAA and VDD pins must be connected together on the
same PCB plane to prevent latchup.
DACC
O
O
O
O
72
71
DACC Analog output.
VAA_DACB
DACB Analog power. All VAA and VDD pins must be connected together on the
same PCB plane to prevent latchup.
DACB
70
69
DACB Analog output.
VAA_DACA
DACA Analog power. All VAA and VDD pins must be connected together on the
same PCB plane to prevent latchup.
DACA
68
67
DACA Analog output.
VAA_DACD
DACD analog power. All VAA and VDD pins must be connected together on the
same PCB plane to prevent latchup.
DACD
66
DACD analog output. If unused, DACD should be left as a no connect.
AGND_DAC
—
—
65, 74
Common DAC Analog ground return. All AGND and VSS pins must be
connected together on the same PCB plane to prevent latchup.
VSS_X
64
63
62
Crystal oscillator ground pin. This pin should be tied to the ground plane.
XTALIN
XTALOUT
I
A crystal can be connected to these pins. The pixel clock output (CLKO) is
derived from these pins with a PLL. XTALIN can be driven as a CMOS input pin.
Internally, this is a CMOS inverter tying XTALOUT to XTALIN. If XTALOUT is
unused, it should be left as a no connect.
O
VDD_X
—
—
61
59
Crystal oscillator supply pin. This pin should be tied to the power supply.
VAA_PLL
Analog power for PLL. All VAA and VDD pins must be connected together on the
same PCB plane to prevent latchup.
AGND_PLL
—
58
Analog ground for PLL. All AGND and VSS pins must be connected together on
the same PCB plane to prevent latchup.
1-2
Conexant
100381B
CONEXANT [ CONEXANT SYSTEMS, INC ]
