CX25870/871
2.0 Internal Registers
Flicker-Free Video Encoder with Ultrascale Technology
2.4 Reading Registers
In this case, the master should simply substitute a STOP in place of the M_ACK. The final step of the
transaction will therefore be:
• START/8B/S_ACK/<readdata>/NACK/STOP
.
Table 2-3 contains the bitmap for the encoder’s read-only registers. Table 2-4 contains the data details for
these registers. As mentioned previously, to enable full register read back, the EN_REG_RD bit must be set to 1.
Table 2-3. Bit Map for Read-Only Registers
Register
Address
7
6
5
4
3
2
1
0
00
02
04
ID[2:0]
VERSION[4:0]
MONSTAT_A MONSTAT_B MONSTAT_C CCSTAT_E
CCSTAT_O
FIFO_OVER
FIELD_CNT[2:0]
PAL
Reserved
SECAM
PLL_RESET_ PLL_LOCK
OUT
FIFO_
UNDER
Reserved
06
MONSTAT_A MONSTAT_B MONSTAT_C MONSTAT_D
FIELD_CNT[3:0]
100381B
Conexant
2-7
CONEXANT [ CONEXANT SYSTEMS, INC ]
