欢迎访问ic37.com |
会员登录 免费注册
发布采购

CN8474AEPF 参数 Datasheet PDF下载

CN8474AEPF图片预览
型号: CN8474AEPF
PDF下载: 下载PDF文件 查看货源
内容描述: 多通道同步通信控制器( MUSYCC ™ ) [Multichannel Synchronous Communications Controller (MUSYCC?)]
分类和应用: 通信控制器
文件页数/大小: 221 页 / 2104 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
 浏览型号CN8474AEPF的Datasheet PDF文件第93页浏览型号CN8474AEPF的Datasheet PDF文件第94页浏览型号CN8474AEPF的Datasheet PDF文件第95页浏览型号CN8474AEPF的Datasheet PDF文件第96页浏览型号CN8474AEPF的Datasheet PDF文件第98页浏览型号CN8474AEPF的Datasheet PDF文件第99页浏览型号CN8474AEPF的Datasheet PDF文件第100页浏览型号CN8474AEPF的Datasheet PDF文件第101页  
CN8478/CN8474A/CN8472A/CN8471A  
5.0 Memory Organization  
Multichannel Synchronous Communications Controller (MUSYCC™)  
5.2 Descriptors  
Table 5-6. Global Configuration Descriptor (2 of 2)  
Bit  
Field  
Name  
Value  
Description  
10  
MPUSEL  
0
Expansion Bus Microprocessor Selection, Motorola-style. Expansion bus supports the  
Motorola-style microprocessor interface and uses Motorola signals: Bus Request  
(BR*), Bus Grant (BG*), Address Strobe (AS*), Read/Write (R/WR*), and Read Strobe  
(RD*).  
1
Expansion Bus Microprocessor Selection, Intel-style. Expansion bus supports the  
Intel-style microprocessor interface and uses Intel signals: Hold Request (HOLD), Hold  
Acknowledge (HLDA), Address Latch Enable (ALE*), Write Strobe (WR*), and Data  
Strobe (DS*).  
9:8  
ALAPSE[1:0]  
0–3  
Expansion Bus Address Duration. MUSYCC extends the duration of valid address bits  
during an EBUS address phase to ALAPSE+1 number of ECLK periods. The control  
lines ALE* (Intel) or AS* (Motorola) indicate that the address bits have had the desired  
setup time.  
7
RSVD  
0
Reserved.  
6:4  
ELAPSE[2:0]  
0–7  
Expansion Bus Data Duration. MUSYCC extends the duration of valid data bits during  
an EBUS data phase to ELAPSE+1 number of ECLK periods. The control lines RD* and  
WR* (Intel) or DS* and R/WR* (Motorola) indicate that the data bits have had the  
desired setup time.  
3
2
INTAMSK  
INTBMSK  
0
1
0
1
0
INTA interrupt enabled.  
INTA interrupt disabled.  
INTB interrupt enabled.  
INTB interrupt disabled.  
1:0  
PORTMAP[1:0]  
Default.  
Port 0 mapped to Channel Group 0.  
Port 1 mapped to Channel Group 1.  
Port 2 mapped to Channel Group 2.  
Port 3 mapped to Channel Group 3.  
Port 4 mapped to Channel Group 4.  
Port 5 mapped to Channel Group 5.  
Port 6 mapped to Channel Group 6.  
Port 7 mapped to Channel Group 7.  
1
Port 0 mapped to Channel Groups 0 and 1.  
Port 1 mapped to Channel Groups 2 and 3.  
Port 2 mapped to Channel Groups 4 and 5.  
Port 3 mapped to Channel Groups 6 and 7.  
2
3
Port 0 mapped to Channel Groups 0, 1, 2, and 3.  
Port 1 mapped to Channel Groups 4, 5, 6, and 7.  
Reserved.  
100660E  
Conexant  
5-11  
 复制成功!