CN8478/CN8474A/CN8472A/CN8471A
4.0 Serial Interface
Multichannel Synchronous Communications Controller (MUSYCC™)
4.5 Channelized Port Mode
4.5 Channelized Port Mode
Each SERI can be configured independently using the PORTMD bit field
(see Table 5-12, Port Configuration Descriptor).
Channelized mode refers to a data bit stream segmented into frames. Each
frame consists of a series of 8-bit time slots. Typically, each time slot recurs every
125 µs at an 8 kHz rate. MUSYCC maintains frame synchronization in both the
transmit and receive directions by using the TSYNC and RSYNC input signals. In
addition, the ROOF input signal can be used to notify MUSYCC of the loss of
frame synchronization.
Table 4-1 describes the contents of a typical 8 kHz frame in each of the
possible channelized port modes.
Table 4-1. Channelized Serial Port Modes
Clock
Frequency
Bits per
Frame
Mode
Description
T1
1.544 MHz
193
Single frame bit, followed by 24 time slots,
numbered TS0–TS23.
E1
2.048 MHz
4.096 MHz
8.192 MHz
256
512
32 time slots, numbered TS0–TS31.
64 time slots, numbered TS0–TS63.
128 time slots, numbered TS0–TS127.
N time slots, numbered TS0–TSN-1.
2 E1
4 E1
1024
Nx128
Nx64 kHz
Nx8
(1 ≤ N ≤ 128)
(1 ≤ N ≤ 128)
4.5.1 Hyperchannels (Nx64)
A hyperchannel results from assigning bits from one or more 8-bit time slots
within a frame. A hyperchannel can comprise from 1–128 time slots. This results
in one logical channel supporting an Nx64 kbps bit rate where the actual data rate
can range between 64 kbps and 8.192 Mbps. The concatenated time slots need not
be contiguous.
Hyperchanneled time slots assigned to the same logical channel number
within a channel group (0–31) are required for proper support.
The Time Slot Descriptor enables and assigns a time slot to a logical channel
(see Table 5-15, Time Slot Descriptor). The configurations for receive and
transmit hyperchannels are independent.
4.5.2 Subchannels (Nx8)
A subchannel results from treating each bit in an 8-bit time slot independently and
assigning a logical channel number to each active bit. Not all 8 bits need to be
active, and any combination of bits within the 8 in a time slot can be assigned to
the same logical channel number. Similarly, multiple time slots can supply one or
more bits to comprise one subchannel. This results in one logical channel
100660E
Conexant
4-3
CONEXANT [ CONEXANT SYSTEMS, INC ]
