4
4.0 Serial Interface
Each serial interface consists of Serial Port Interfaces (SERI), Bit Level
Processors (BLP), Direct Memory Access Controllers (DMAC), and an Interrupt
Controller (INTC). A separate set of SERI, BLP, and DMAC services receive
channels and transmit channels independently. A single INTC is shared by the
receive and transmit BLP. Figure 4-1 illustrates the serial port/host interface.
Figure 4-1. Serial Interface Functional Block Diagram, Channel Group 0
Serial Interface
Channel Group 0
Clock
Synchronization
Data
Out-of-Frame
Status
Rx
Bit Level
Processor
Rx
Port
Interface
Rx DMAC
Rx Control
Rx Data
Rx Event
Tx Event
Interrupt
Controller
Interrupt
Tx Data
Clock
Synchronization
Data
Tx
Tx
Port
Interface
Bit Level
Processor
Tx Control
Tx DMAC
8478_013
NOTE(S):
1. Channel Groups 1, 2, 3, 4, 5, 6, and 7, when supported, are identical to Group 0.
2. Bt8478 supports Channel Groups 0 through 7.
3. Bt8474 supports Channel Groups 0, 1, 2, and 3.
4. Bt8472 supports Channel Groups 0 and 1.
100660E
Conexant
4-1
CONEXANT [ CONEXANT SYSTEMS, INC ]
