Bt860/861
5.0 Serial Programming Interface and Registers
5.4 Register Detail
Multiport YCrCb to NTSC/PAL /SECAM
Register 33–34
Default
Value
Register
D7
D6
D5
D4
D3
D2
D1
D0
33
34
A3
DB_MAX[7:0]
05
Reserved
DB_MAX[10:8]
Reserved bits should be set to zero when written and will return zero when read.
DB_MAX[10:0]
Upper Boundary for Db Frequency Deviation in SECAM
DB_MAX = (FMAX / FCLK) × 213
Register 35–36
Default
Value
Register
D7
D6
D5
D4
D3
D2
D1
D0
35
36
9F
04
DB_MIN[7:0]
Reserved
DB_MIN[10:8]
Reserved bits should be set to zero when written and will return zero when read.
DB_MIN[10:0]
Lower Boundary for Db Frequency Deviation in SECAM
DB_MIN = (FMIN / FCLK) × 213
Register 37
Default
Value
Register
D7
D6
D5
D4
D3
D2
D1
D0
37
00
Y_OFF[7:0]
Luminance Level Offset (brightness control)
Y_OFF[7:0]
The luminance level offset is referenced from black, and can be adjusted from –22.31 IRE
(below black) to +22.14 IRE (above black). Active video will be added to the offset level.
Y_OFF is a twos complement number, such that 0x00 = 0 IRE offset, 0x0F is +22.14 IRE
offset, and 0x10 is –22.31 IRE offset.
Register 38
Default
Value
Register
D7
D6
D5
D4
D3
D2
D1
D0
38
00
PHASE_OFF[7:0]
PHASE_OFF[7:0]
Subcarrier Phase Offset (for SC – H Phase Adjustments)
PHASE_OFF = 256 × phase offset
360°
Phase offset ranges from 0° – 358.6°.
D860DSA
Conexant
5-29