Bt860/861
5.0 Serial Programming Interface and Registers
5.2 Internal Registers
Multiport YCrCb to NTSC/PAL /SECAM
Table 5-2. Register Bit Map (4 of 4)
Sub
addr
Default
D7
D6
D5
D4
D3
D2
D1
TXRM
D0
Values(1)
Reserved(4)
59
5A
02
00
00
7F
0
TXE
TTX_DIS[7:0]
TTX_DIS[15:8]
MULT_UU[7:0]
MULT_VU[7:0]
MULT_UV[7:0]
MULT_VV[7:0]
5B
5C
5D
5E
0
5F
7F
—
80
01
80
72
00
60–6F
70
Reserved. Do not write to these registers.
LC_FIFOWIN[7:0]
Reserved(4)
LC_FIFOWIN[8]
71
72
LC_MAXOFF[7:0]
73
XL_GAIN[3:0]
XL_SAT[3:0]
74–FF
Reserved. Do not write to these registers.
NOTE(S):
(1)
Default values in this table are hexadecimal.
(2)
(3)
(4)
These registers are read only.
These bits return zero when read.
Reserved bits should be set to zero when written and will return zero when read.
D860DSA
Conexant
5-7