2.0 Inputs and Timing
Bt860/861
2.3 Configurations and Timing
Multiport YCrCb to NTSC/PAL /SECAM
In this configuration, the Bt860/861 is a slave to the ITU-R BT.656 data
stream. However, the HSYNC*, VSYNC* and FIELD pins can be configured as
outputs for synchronization with a video slave on the OSD port. While in this
configuration, the HSYNC*, VSYNC*, and FIELD timing is identical to
ITU-R BT.601 master mode timing.
2.3.3 VID Port (Video Decoder Locked) Timing
The VID port can accept video signals from a video decoder, such as the Bt835,
and is buffered using a FIFO to support asynchronous video streams. The internal
logic will automatically pulls data from the FIFO when required. The data lines
for the VID port are VID[7:0], and the control lines are VIDCLK, VIDHACT,
VIDVACT, VIDFIELD, and VIDVALID. Figure 2-9 illustrates an example
configuration using the Bt835 and the Bt860. The PLL and the horizontal and
vertical counters are adjusted to track the incoming data on the VID port. The
Bt860/861 can be configured to output HSYNC* and VSYNC* signals in order
to synchronize with the P, OSD, and ALPHA signals. Timing mode 1 must be
used when the VID port is selected in conjunction with a source on the P or OSD
ports. The PLL (using the XTI and XTO inputs) must be selected as the system
clock source.
2-12
Conexant
D860DSA
CONEXANT [ CONEXANT SYSTEMS, INC ]
