5.0 Serial Programming Interface and Registers
5.4 Register Detail
Bt860/861
Multiport YCrCb to NTSC/PAL /SECAM
Register 4A–4C
Default
Value
Register
D7
D6
D5
D4
D3
D2
D1
D0
4A
4B
4C
—
EWSSF2
EWSSF1
Reserved
SQUARE
WSDAT[4:1]
—
—
WSDAT[12:5]
WSDAT[20:13]
Reserved bits should be set to zero when written and will return zero when read.
EWSSF2
EWSSF1
SQUARE
Enable CGMS Function on Field 2
0 = Disable field 2 data.
1 = Enable field 2 data (525 line mode only).
Enable WSS or CGMS Function on Field 1
0 = Disable field 1 data.
1 = Enable field 1 data.
Square Pixel or CCIR Timing Select for Teletext and WSS
0 = ITU-R BT.601 operation for Teletex and WSS.
1 = Square pixel operation for Teletex and WSS.
WSDAT[20:1]
WSS and CGMS Data Bits
Register 4D–4E
Default
Value
Register
D7
D6
D5
D4
D3
D2
D1
D0
4D
4E
39
01
TTXHS[7:0]
Reserved
TTXHS[10:8]
Reserved bits should be set to zero when written and will return zero when read.
TTXHS[10:0] TTXREQ Rising Edge
Number of clocks from falling edge of HSYNC* to rising edge of TTXREQ minus an
offset. Used when TXRM = 0.
TTXHS = (desired distance in clocks) – 2 (3 for slave mode)
5-34
Conexant
D860DSA