5.0 Electrical/Mechanical Specifications
5.4 AC Characteristics
Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
Table 5-7. Output Data Delay Timing
Output
Data
Symbol
Clock
Edge
Minimum
Maximum
Units
Figure
1
MCLK
Rising
ONESEC
INTR
0
0
0
0
0
0
0
0
0
0
0
0
0
–5
0
0
0
0
0
0
0
10
10
20
20
20
20
20
20
20
20
20
20
20
15
30
30
30
20
20
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
5-3
RCKI
—
RCKO
RCKO
Rising
RPOSO
RNEGO
RDLO
Falling
—
RDLCKO
TCKO
TCKI or
ACKI
—
—
TDLCKO
TNRZO
MSYNCO
TPOSO
TNEGO
RDLO
Rising
TCKO
Rising
Rising
RDLCKO
RSBCKI
RPCM_NEG
(addr 0D1)
RPCMO
RSIGO
RINDO
SIGFRZ
RFSYNC
RMSYNC
TINDO
RSYN_NEG
(addr 0D1)
TSBCKI
TPCM_NEG
(addr 0D4)
TSYN_NEG
(addr 0D4)
TFSYNC
TMSYNC
0
0
20
20
ns
ns
5-3
5-3
Table 5-8. 1-Second Input/Output Timing
Symbol
Parameter
Minimum
Maximum
Units
1
2
Input Pulse Width
Output Pulse Width
1/MCLK
125
1 sec–125 µs
As shown
250
µs
5-6
Conexant
N8370DSE