Bt8370/8375/8376
5.0 Electrical/Mechanical Specifications
5.4 AC Characteristics
Fully Integrated T1/E1 Framer and Line Interface
Table 5-6. Input Data Setup and Hold Timing
Symbol
Clock
Edge
Input Data
Minimum
Maximum
Units
Figure
1
MCLK
Rising
ONESEC
RST*
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5-2
5-2
RCKI
Falling
Falling
RPOSI
5-2
RNEGI
5-2
TDLCKO
RSBCKI
TDLI
5-2
RSYN_NEG
(addr 0D1)
RMSYNC
RFSYNC
TPCMI
5-2, 5-5
5-5
TSBCKI
TPCM_NEG
(addr 0D4)
5-2
TSIGI
5-2
TSYN_NEG
(addr 0D4)
TFSYNC
TMSYNC
ONESEC
RST*
5-5
5-2, 5-5
5-2
2
MCLK
RCKI
TCKI
Rising
Falling
Falling
Falling
5-2
RPOSI
5-2
RNEGI
5-2
TPOSI
5-2
TNEGI
5-2
TDLCKO
RSBCKI
TDLI
5-2
RSYN_NEG
(addr 0D1)
RMSYNC
RFSYNC
TPCMI
5-2, 5-5
5-5
TSBCKI
TPCM_NEG
(addr 0D4)
5-2
TSIGI
5-2
TSYN_NEG
(addr 0D4)
TFSYNC
TMSYNC
RMSYNC
RFSYNC
TMSYNC
TFSYNC
RMSYNC
RFSYNC
TMSYNC
TFSYNC
5-5
5-2, 5-5
5-5
3
4
RSBCKI
TSBCKI
RSBCKI
TSBCKI
RSYN_NEG
TSYN_NG
5-5
5-5
5-5
RSYN_NEG
TSYN_NEG
5-5
5-5
5-5
5-5
N8370DSE
Conexant
5-5