Bt8370/8375/8376
3.14 Clock Rate Adapter Registers
LFGAIN[3:0]
Fully Integrated T1/E1 Framer and Line Interface
Loop Filter Gain—Determines CLAD jitter tolerance and jitter attenuation characteristics by
selecting the NCO loop filter's proportional phase error gain. Lower gain values improve jitter
tolerance by reducing phase response time, but provide less jitter attenuation. Higher gain
values increase the phase response time and improve jitter attenuation at the expense of loop
acquisition time.
NOTE:
Loop instability or acquisition failures may result from incorrectly programmed
LFGAIN values. Typically, LFGAIN is programmed to provide a minimum 3 Hz loop
bandwidth and 20 dB/decade jitter attenuation with 6 Hz filter cutoff frequency.
LFGAIN values of 5 or 6 are typically chosen to meet jitter requirements.
LFGAIN
0000
Proportional Gain
0
1/2
|
|
15
1111
1/2
091—CLAD Frequency Select (CSEL)
7
6
5
4
3
2
1
0
VSEL[3]
VSEL[2]
VSEL[1]
VSEL[0]
OSEL[3]
OSEL[2]
OSEL[1]
OSEL[0]
VSEL[3:0]
CLADV Frequency Select—Applicable only if CEN [addr 90] is active. Picks one of eight
CLAD divider chain frequencies to feed back to the CPHASE detector. (Refer to Tables 2-8
through 2-9 for programming examples.) The selected CLADV frequency passes to VSCALE
for further division before phase detector comparison.
VSEL
0000
0001
0010
0011
0100
0101
0110
0111
CLADV Frequency (kHz)
1024
2048
4096
8192
2560
1544
1536
XSEL
T1/E1 line rate x 2
16,384
(addr 090)
1xxx
3-84
Conexant
N8370DSE