Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
3.8 Receiver Registers
RYEL
Receive Yellow Alarm—Real-time or integrated RYEL status depends on both the selected
receive framer and Yellow Alarm integration modes [YEL_INTEG; addr 045]. Refer to
Table 3-12, Receive Yellow Alarm for a mode summary and Table 3-13, Receive Yellow Alarm
Set/Clear Criteria for set/clear criteria.
0 = No alarm
1 = Receive Yellow Alarm
RAIS
Receive Alarm Indication Signal—Criteria for detection and clearance of RAIS, per ITU
G.775 and ANSI T1.231.
Mode
E1
RAIS
0
Set/Clear Criteria
Cleared if two consecutive double frames (500 µs)
each contain three or more zeros out of 512 bits, or if
FAS alignment is recovered [FRED = 0; addr 049].
E1
T1
T1
1
0
1
Set if two consecutive double frames each contain two
or fewer zeros out of 512 bits, and when FAS
alignment is lost [FRED = 1; addr 049].
Cleared if data received for a period of 3 ms contains
five or more zeros out of 4,632 bits, or if the frame
alignment is recovered [FRED = 0; addr 049].
Set if data received for a period of 3 ms contains four
or fewer zeros out of 4632 bits, and the frame
alignment is lost [FRED = 1; addr 049].
RALOS
Receive Analog Loss of Signal or RCKI Loss of Clock—Real-time RALOS status depends on
the selection of receive bipolar or digital inputs [RDIGI; addr 020].
RDIGI
RALOS
Set/Clear Criteria
0
0
0
1
Cleared if AGC gain setting is less than VGA_MAX.
Set if AGC gain setting equals VGA_MAX [addr
024]. This indicates that the RTIP/RRING input
signal amplitude remains below the programmed
input signal threshold for more than 1 ms.
1
1
0
1
Cleared if RCKI transitions at least once in 125 µs.
Set when RCKI remains low for 125 µs.
RLOS
Receive Loss of Signal—Criteria for detection and clearance of RLOS per ITU G.775 and
T1.231.
Mode
T1
RLOS
0
Set/Clear Criteria
Cleared if the received data sustains an average pulse
density of 12.5% over a period of 114 bits, starting
with the receipt of a pulse—and no occurrence of 100
consecutive zeros.
T1
E1
1
0
Set if 100 consecutive zeros are received.
Cleared upon reception of 192 bits in which no
interval of 32 consecutive zeros appears where the
192-bit window begins with receipt of a pulse.
E1
1
Set upon reception of 32 consecutive 0s.
N8370DSE
Conexant
3-55
CONEXANT [ CONEXANT SYSTEMS, INC ]
