Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
3.8 Receiver Registers
LATCH_ERR
Enable ONESEC Latching of Errors—Determines the interval for which latched active errors
are held in error interrupt [ISR5; addr 006] and in pattern interrupt [ISR0; addr 00B] status.
IER
0
LATCH_ERR
ISR Latched
ISR Hold Time
Until read clear
ONESEC interval
Until read clear
0
1
Rising edge event
Rising edge event
Rising edge event
0
1
X
LATCH_ALM
Enable ONESEC Latching of Alarms—Determines the interval for which latched active
alarms remain held in alarm interrupt status [ISR7, ISR6; addr 004, 005].
IER
0
LATCH_ALM
ISR Latched
ISR Hold Time
Until read clear
ONESEC interval
Until read clear
0
1
Rising edge or transition
Rising edge or transition
Rising edge or transition
0
1
X
NOTE: Interrupt type determines rising edge or transition event.
047—Alarm 1 Status (ALM1)
ALM1 reports current status of receive alarms. Any change in the current status activates the corresponding
interrupt status bit [ISR7; addr 004].
7
6
5
4
3
2
1
0
RMYEL
RYEL
—
RAIS
RALOS
RLOS
RLOF
SIGFRZ
RMYEL
Receive Multiframe Yellow Alarm—Real-time or integrated RMYEL status depends on the
selected framer mode and the Yellow Alarm integration mode [YEL_INTEG; addr 045]. Refer
to Table 3-12 for mode summary and Table 3-13 for set/clear criteria. For YF detection, DL1
must be configured for FDL operation and RDL1_EN set to one. Also, RBOP_START must be
set to one in register BOP [addr 0A0]. Refer to registers DL1_TS [addr 0A4] and DL1_CTL
[addr 0A6].
0 = no alarm
1 = receive multiframe Yellow Alarm
Table 3-12. Receive Yellow Alarm
YEL_INTEG = 0
YEL_INTEG = 1
Receive Framer
Mode
RYEL
RMYEL
RYEL
RMYEL
FT/SF/SLC
JYEL
T1DM
ESF
YB2
YJ
—
—
YB2_INT
YJ_INT
—
—
Y24
YB2
Y0
—
Y24_INT
YB2_INT
Y0_INT
Y0_INT
—
YF
—
YF_INT
—
FAS
CAS
Y0
Y16
Y16_INT
NOTE(S): Last known frame alignment is used to locate and monitor Yellow Alarms.
Therefore, RYEL and RMYEL do not accurately report alarms during receive loss of frame
alignment [RLOF; addr 047].
N8370DSE
Conexant
3-53