Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
3.7 Receive LIU Registers
Figure 3-1. Receive Equalizer Eye Pattern Output
ADDRESS 028 - EQ OUTPUT LEVEL (EQ_OUT)
± Error
Tolerance
Positive
Pulse Height
± Full Scale
Negative
Pulse Height
± Error
Tolerance
029—Variable Gain Amplifier Status
7
6
5
4
3
2
1
0
—
—
VGA[5]
VGA[4]
VGA[3]
VGA[2]
VGA[1]
VGA[0]
VGA[5:0]
Indicates the current VGA gain level. The processor must write to this register (any value)
before reading it to allow internal latches to update. The internal VGA has 64 gain values with
code value 0x3F (63 dec) equal to maximum gain. The processor can estimate the line
attenuation (or received signal level) in dB relative to a 3 V peak pulse level, according to the
following table:
Line Attenuation
VGA Gain
0
10
20
30
40
50
60
64dB
0x0F
0x1C
0x23
0x2B
0x34
0x3A
0x3D
0x3F (max)
or:
0.77 dB/step—under 10 dB
1.25 dB/step—10–40 dB
1.67 dB/step—40–50 dB
2.80 dB/step—50 dB
N8370DSE
Conexant
3-45