Bt8370/8375/8376
3.0 Registers
Fully Integrated T1/E1 Framer and Line Interface
3.5 Interrupt Enable Registers
3.5 Interrupt Enable Registers
Unused bits indicated by a dash (—) are reserved and should be written to 0. Writing to reserved bits has no
effect.
Writing a 1 to an IER bit allows that specific interrupt source to activate its respective ISR bit, the associated
IRR bit, and the INTR* output. When cleared, each IER bit allows that source to activate its respective ISR bit,
but prevents activation of the INTR* output and the associated IRR bit.
00C—Alarm 1 Interrupt Enable Register (IER7)
7
6
5
4
3
2
1
0
RMYEL
RYEL
RPDV
RAIS
RALOS
RLOS
RLOF
SIGFRZ
RMYEL
Enable RMYEL Interrupt
Enable RYEL Interrupt
Enable RPDV Interrupt
Enable RAIS Interrupt
RYEL
RPDV
RAIS
RALOS
RLOS
RLOF
SIGFRZ
Enable RALOS or RLOC Interrupt
Enable RLOS Interrupt
Enable RLOF Interrupt
Enable SIGFRZ Interrupt
00D—Alarm 2 Interrupt Enable Register (IER6)
7
6
5
4
3
2
1
0
LOOPDN
LOOPUP
TPDV
TSHORT
TLOC
—
TLOF
ONESEC
LOOPDN
Enable LOOPDN Interrupt
Enable LOOPUP Interrupt
Enable TPDV Interrupt
Enable TSHORT Interrupt
Enable TLOC Interrupt
Enable TLOF Interrupt
Enable ONESEC Interrupt
LOOPUP
TPDV
TSHORT
TLOC
TLOF
ONESEC
N8370DSE
Conexant
3-23
CONEXANT [ CONEXANT SYSTEMS, INC ]
