CN8223
4.0 Electrical and Mechanical Specifications
ATM Transmitter/Receiver with UTOPIA Interface
4.3 Timing
4.3.4 UTOPIA Interface Timing
Table 4-8 and Figure 4-7 display the timing requirements and characteristics of
the UTOPIA interface. All times are in nanoseconds.
Table 4-8. UTOPIA Interface Timing
Name
Interval
Description
Transmit Clock Input Period
Min
Max
tT1
1–4
40
—
tT2
tcff
1–3
1–2
Transmit Clock High Pulse Width
16
3
24
10
—
—
—
—
—
24
10
10
—
—
Transmit Clock High to Full Flag Output Valid
TxEnb~ Setup to Transmit Clock Rising Edge
TxData, TxPrty, TxSOC Setup to Transmit Clock
TxEnb~ Hold after Transmit Clock Rising Edge
TxData, TxPrty, TxSOC Hold after Transmit Clock
Receive Clock Input Period
ttes
tdsu
tteh
tdh
6–7
8
5–7
8
4–6
1
7–8
1
tR1
tR2
tcef
tcd
9–12
9–11
9–10
14–15
13–14
12–13
40
16
3
Receive Clock High Pulse Width
Receive Clock High to Empty Flag Output Valid
Receive Clock High to RxData, RxPrty, RxSOC Valid
RxEnb~ Setup to Receive Clock Rising Edge
RxEnb~ Hold after Receive Clock Rising Edge
3
tres
treh
8
1
100046C
Conexant
4-13
CONEXANT [ CONEXANT SYSTEMS, INC ]
