CN8223
4.0 Electrical and Mechanical Specifications
ATM Transmitter/Receiver with UTOPIA Interface
4.3 Timing
4.3.3 FIFO Interface Timing
Table 4-7 and Figure 4-6 display the timing requirements and characteristics of
the FIFO port interface. All times are in nanoseconds.
Table 4-7. FIFO Port Interface Timing
PHY Type 4-7
Min
PHY Type 0-3
Min
Name
Interval
Description
t
t
—
Transmit or Receive Clock Input Period
6.4
22.4
ptx, prx
t
1–2
Write Strobe Low Pulse Width
4 × t
4 × t
2 × t
6 × t
wdl
wdr
prx
prx
prx
t
2–4
Write Strobe Recovery Time
prx
t
3–4
Full Input Setup to Write Strobe Falling Edge
Invalid Indication Stable before Write Strobe Rising Edge
Data Out Valid before Write Strobe Rising Edge
Invalid Indication Stable after Write Strobe Rising Edge
Data Out Valid after Write Strobe Rising Edge
Receive Sync Valid before Write Strobe Rising Edge
Receive Sync Valid after Write Strobe Rising Edge
Write Error Output Valid after Write Strobe Falling Edge
Read Strobe Low Pulse Width
4.0
4.0
fws
t
5–7
3 × t
3 × t
3 × t
3 × t
3 × t
3 × t
2 × t
2 × t
4 × t
4 × t
2 × t
4 × t
ivws
prx
prx
prx
prx
prx
prx
prx
prx
prx
prx
prx
prx
t
6–7
dows
t
12–13
7–8
wsiv
t
wsdo
t
t
9–12
12–14
10–11
15–17
17–20
16–17
17–18
19–21
21–22
23–26
24–26
syws
wssy
t
1.0
1.0
err
t
4 × t
4 × t
2 × t
rdl
rdr
ptx
ptx
prx
prx
t
Read Strobe Recovery Time
6 × t
t
Data In Setup before Read Strobe Rising Edge
Data In Hold after Read Strobe Rising Edge
Transmit Sync Valid before Read Strobe Rising Edge
Transmit Sync Valid after Read Strobe Rising Edge
Frame Sync Valid before Read Strobe Rising Edge
Empty Input Setup to Read Strobe Rising Edge
3.0
2.0
3 × t
3.0
2.0
dirs
rsdi
t
t
t
2 × t
4 × t
2 × t
4.0
syrs
ptx
ptx
ptx
prx
prx
prx
4 × t
2 × t
rssy
t
fsrs
t
4.0
ers
100046C
Conexant
4-11
CONEXANT [ CONEXANT SYSTEMS, INC ]
