3.0 Registers
CN8223
3.7 Status Register Overview
ATM Transmitter/Receiver with UTOPIA Interface
Table 3-14 lists definitions for E3 G.832 and E4 G.832 LINE_STATUS bits.
Table 3-14. E3 G.832, E4 G.832 LINE_STATUS Bit Definitions
Bit
Name
Description
15
14
13
0
Not used
One-Second Count
Set if the one-second timer input is detected.
Payload Type
Mismatch
Set if the received value in the payload type bits of the MA octet do not equal 010 for seven
consecutive frames.
12
11
10
9
MA FERF
MA FEBE
EM BIP Error
x
Set if the FERF bit in the MA octet is high in the G.832 E3/E4 frame format.
Set if the FEBE bit in the MA octet is high in the G.832 E3/E4 frame format.
Set if there is an error in the BIP-8 code (EM octet) checking.
Not used
8
LOC
Indicates that HEC cell delineation has been lost. Cell delineation is lost if seven consecutive
HEC errors occur at the current cell delineation position. This bit will also be active for 53-octet
formats using external framers or the parallel interface.
7
E3/E4 LOF 2–3
Set if E3/E4 LOF is high for three consecutive one-second latching signals (rising edge on
ONESECI).
6
5
E3/E4 LOF
E3/E4 OOF
Set when E3/E4 OOF is active for 24 consecutive frames.
Set if four consecutive errored A1/A2 framing patterns are observed in the G.832 E3/E4
format.
4, 3
2
x
Not used
E3/E4 AIS
Set if an unframed all-1s pattern (less than 0.25% zero content) is detected in the G.832 E3/E4
format.
1
0
x
Not used
LOS (Input)
Set if a LOS is detected by the internal B3ZS/HDB3 decoder, or if the RXLOS~ input pin is
active low. Internal LOS detection is the occurrence of 175 75 zeros prior to B3ZS/HDB3
decoding. The RXLOS~ input pin should be tied high unless an external line interface unit
provides an active low LOS indication.
NOTE(S): “x” = Bit position is undefined and should be ignored.
3-32
Conexant
100046C