Calling Line Identifier
MX602 - PRELIMINARY INFORMATION
8
t
DFOFF
FSK signal
Line Signal
t
DFON
DET
MODE, ZP
FSK Receiver mode
See section 6.1 for definitions of t
and t
DFOFF
DFON
Figure 6: FSK Level Detector operation
4.5 FSK Demodulator
This block converts the 1200 baud FSK input signal to a digital data stream which is output via the RXD pin as long as the
Data Retiming function is not enabled (see section 4.6). This output does not depend on the state of the FSK Level
Detector output.
Note: In the absence of a valid FSK signal, the demodulator may falsely interpret speech or other extraneous signals as
data.
4.6 FSK Data Retiming
The Data Retiming block extracts the 8 data bits of each character from the received asynchronous data stream, and
presents them to the µC under the control of strobe pulses applied to the RXCLK input. The timing of these pulses is not
critical and they may easily be generated by a simple software loop. This facility removes the need for a UART in the µC
without incurring an excessive software overhead.
The block operates on a character by character basis by first looking for the mark to space transition which signals the
beginning of the start bit. Using this transition as a timing reference, the block samples the output of the FSK
Demodulator in the middle of each of the following 8 received data bits, and stores the results in an internal 8-bit shift
register.
When the eighth data bit has been clocked into the internal shift register, the MX602 examines the RXCLK input. If this is
low then the IRQ output will be pulled low and the first of the stored data bits put onto the RXD output pin. On detecting
that the IRQ output has gone low, the µC should pulse the RXCLK pin high 8 times. The high to low transition at the end
of the first 7 of these pulses will be used by the MX602 to shift the next data bit from the shift register onto the RXD
output. At the end of the eighth pulse the FSK Demodulator output will be reconnected to the RXD output pin. The IRQ
output will be cleared the first time the RXCLK input goes high.
Thus to use the Data Retiming function, the RXCLK input should be kept low until the IRQ output goes low; if the Data
Retiming function is not required the RXCLK input should be kept high.
The only restrictions on the timing of the RXCLK waveform are those shown in Figure 7 and the need to complete the
transfer of all eight bits into the µC within 8.3mSec (the time of a complete character at 1200 baud).
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