Calling Line Identifier
MX602 - PRELIMINARY INFORMATION
4
2. Signal List
Pin No.
Signal
Type
output Output of the on-chip Xtal oscillator inverter
input Input to the on-chip Xtal oscillator inverter
input (S) Input to the Ring or Line Polarity Reversal Detector
input / Open-drain output and Schmitt trigger input forming part of the Ring or Line Polarity
Description
1
XTAL
XTAL
RD
2
3
4
RT
output Reversal detector. An external resistor to V and a capacitor to V should be
DD
SS
connected to RT to filter and extend the RD input signal
5
6
7
8
9
AMPOUT
IN -
output Output of the on-chip Input Signal Amplifier
input
input
Inverting input to the on-chip Input Signal Amplifier
Non-inverting input to the on-chip Input Signal Amplifier
IN +
V
SS
power Negative supply
V
BIAS
output Internally generated bias voltage, held at V /2 when the device is not in 'Zero-Power'
DD
mode. Should be bypassed to V by a capacitor mounted close to the device pins.
SS
10
11
12
MODE
ZP
input (S) Input used to select the operating mode.
input (S) High level on this input selects 'Zero-Power' mode.
output Open-drain output (active low) that may be used as an Interrupt Request / Wake-up
input to the associated µC. An external pull-up resistor should be connected between
IRQ
this output and V
.
DD
13
14
15
16
DET
RXCLK
RXD
output Logic level output driven by the Ring or Line Polarity Reversal Detector, the Tone
Alert Detector or the FSK Level detect circuits, depending on the operating mode.
input
Logic level input which may be used to clock received data bits out of the FSK Data
Retiming block
output Logic level output carrying either the raw output of the FSK Demodulator or re-timed
8-bit characters depending on the state of the RXCLK input
V
DD
power Positive supply. Levels and thresholds within the device are proportional to this
voltage. Should be bypassed to V by a capacitor mounted close to the device pins.
SS
Notes: input (S) = Schmitt trigger input
© 1998 MX•COM Inc.
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