Quad Digital Control Amplifier
7
MX019
4.1.2 Timing
Timing (Figure 3)
Serial Clock "High" Pulse Width
Serial Clock "Low" Pulse Width
Data Set-up Time
Data Hold Time
Load/Latch Pulse Width
Load/Latch Delay
Load/Latch Over
Serial Data Clock Frequency
(t
PWH
)
(t
PWL
)
(t
DS
)
(t
DH
)
(t
LLW
)
(t
LLD
)
(t
LLO
)
Min.
250
250
150
50.0
150
200
0.0
2.0
Typ.
Max.
Units
ns
ns
ns
ns
ns
ns
ns
MHz
SERIAL DATA CLOCK
t
PWH
t
PWL
SERIAL DATA IN
(ONE 8-BIT WORD)
t
DS
t
DH
8th
Clock
Pulse
Next
Clock
Pulse
Logic '1'
Loaded
First
BIT 7
Loaded Last
BIT 6 BIT 1
BIT 0
LOAD/LATCH
t
LLD
t
LLW
t
LLO
LOAD/LATCH
Figure 3: Serial Control Data Loading Diagram
1998
MX-COM, INC.
www.mxcom.com Tel: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc. # 20480077.006
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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CMLMICRO [ CML MICROCIRCUITS ]
