Quad Digital Control Amplifier
4
MX019
2. Signal List
Pin No.
J/P
DW
1
2
TN
1
2
Serial Clock
Load/
Latch
This external clock pulse input is used to “clock in” the Control Data. See
Figure 3. This input has an internal 1M pullup resistor.
This input governs the loading and execution of the control data. During
serial data loading this input should be kept at a logical '0' to ensure that data
rippling past the latches has no effect. When all 8 bits have been loaded,
this input should be strobed '0 - 1 - 0' to latch the new data in. Data is
executed on the falling edge of the strobe. If the
Load
/Latch input is used
this pin should be left open circuit. This input has an internal 1M pullup
resistor.
Name
Description
3
4
LOAD / LATCH This inverted Load/
Latch
input governs the loading and execution of control
data. During serial data loading this input should be kept at a logical '1' to
ensure that data rippling past the latches has no effect. When all 8 bits have
been loaded, this input should be strobed '1' - '0' - '1' to latch the new data in.
Data is executed on the rising edge of the strobe. If the Load/
Latch
input is
used this pin should be left open circuit. This input has an internal 1M
pulldown resistor.
Ch1 Input
Ch2 Input
Ch3 Input
Ch4 Input
V
SS
V
BIAS
Ch4 Output
Ch3 Output
Ch2 Output
Ch1 Output
Chip Address
Control Data
Input
Negative supply rail (GND).
The output of the on-chip bias circuitry, held at V
DD
/2. This pin should be
decoupled to V
SS
as shown in Figure 2.
Controlled Analog Outputs :
These are individual "Gain Controlled" amplifier outputs. Ch1 to Ch3 range
from -3dB to +3dB in 0.43dB steps, Ch4 can be utilized as a volume control,
ranging from -14dB to +14dB in 2.0dB steps. In the “OFF” mode there is no
output from the selected amplifier.
A logic input to select one of two MX019 ICs in a system (see Table 1). This
input has an internal 1M pulldown resistor.
Operation of the 4 amplifier channels (Ch1 – Ch4) is controlled by the 8 bits
of data entered serially at this pin. The data is entered (bit 7 to bit 0) on the
rising edge of the external Serial Clock. The data format is described in
Table 1, Table 2 and Figure 3. This input has an internal 1M pullup resistor.
Positive supply rail. A single +5V power supply is required.
Analog Inputs :
These individual amplifier inputs are self-biasing; AC input analog signals
must be capacitively coupled to these pins, as shown in Figure 2.
Note that amplifiers Ch1 to Ch4 are 'inverting amplifiers.'
4
5
6
7
8
9
10
11
12
13
14
15
5
6
7
8
12
13
14
17
18
19
20
23
16
24
V
DD
1998
MX-COM, INC.
www.mxcom.com Tel: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc. # 20480077.006
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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