TETRA Baseband Processor
FX980
1.3
Signal List
(continued)
Package
#
Pin No.
L6 Package
44 PLCC
Pin No.
10
9
8
7
36
Signal
Name
AUXDAC1
AUXDAC2
AUXDAC3
AUXDAC4
BIAS1
Type
O/P
O/P
O/P
O/P
BI
Description
Auxiliary DAC channel 1
Auxiliary DAC channel 2
Auxiliary DAC channel 3
Auxiliary DAC channel 4
Analogue bias level. This pin should be de-
coupled to V
SSB.
Analogue bias level. This pin should be de-
coupled to V
SSB
.
I Channel analogue positive supply rail. This
pin should be de-coupled to V
SS1.
Q Channel analogue positive supply rail. This
pin should be de-coupled to V
SS2.
Analogue Bias positive supply rail. Levels and
voltages are dependent upon this supply. This
pin should be de-coupled to V
SSB.
Auxiliary analogue positive supply rail. This
pin should be de-coupled to V
SSA.
Digital positive supply rail. This pin should be
de-coupled to V
SS.
I Channel analogue negative supply rail.
Q Channel analogue negative supply rail.
Analogue Bias negative supply rail.
Auxiliary analogue negative supply rail.
Primary digital negative supply rail.
35
BIAS2
BI
32
V
CC1
V
CC2
V
CC3
Power
33
Power
34
Power
6
V
DD1
V
DD
V
SS1
V
SS2
V
SSB
V
SSA
V
SS
Power
3,21
Power
27,40
28,39
31
5
4,13,22
Ground
Ground
Ground
Ground
Ground
Notes:
I/P =
O/P =
BI
=
Input
Output
Bi-directional
©
1997
Consumer Microcircuits Limited
5
D/980/3
CMLMICRO [ CML MICROCIRCUITS ]
