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FX929BD5 参数 Datasheet PDF下载

FX929BD5图片预览
型号: FX929BD5
PDF下载: 下载PDF文件 查看货源
内容描述: [Modem-Support Circuit, CMOS, PDSO24,]
分类和应用: 电信光电二极管电信集成电路
文件页数/大小: 47 页 / 1631 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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4-Level FSK Modem Data Pump  
FX929B  
Rx Level/Clock Extraction  
These circuits, which operate only in receive mode, derive a symbol rate clock from the received signal and  
measure the received signal amplitude and dc offset. This information is then used to extract the received 4-  
level symbols and also to provide an input to the received Data Quality measuring circuit. The external  
capacitors C6 and C7 form part of the received signal level measuring circuit. The capacitors C6 and C7 are  
driven from a very high impedance source so any measurement of the voltages on the DOC pins must be  
made via high input impedance (MOS input) voltage followers to avoid disturbance of the level measurement  
circuits.  
Further details of the level and clock extraction functions are given in section 1.6.3.  
Clock Oscillator and Dividers  
These circuits derive the transmit symbol rate (and the nominal receive symbol rate) by frequency division of a  
reference frequency which may be generated by the on-chip Xtal oscillator or applied from an external source.  
Note: If the on-chip xtal oscillator is to be used, then the external components X1, C3, C4 and R3 are  
required. If an external clock source is to be used, then it should be connected to the XTAL/CLOCK input pin,  
the XTALN pin should be left unconnected, and X1, C3, C4 and R3 not fitted.  
1.5.2 Modem - µC Interaction  
In general, data is transmitted over-air in the form of messages, or 'Frames', consisting of a 'Frame Preamble'  
followed by one or more formatted data blocks. The Frame Preamble includes a Frame Synchronisation  
pattern designed to allow the receiving modem to identify the start of a frame. The following data blocks are  
constructed from the 'raw' data using a combination of CRC (cyclic redundancy checksum) generation,  
Forward Error Correction coding and Interleaving. Details of the message formats handled by the modem are  
given in Section 1.5.3 and Figures 7 and 7a.  
To reduce the processing load on the associated mC, the FX929B modem has been designed to perform as  
much as possible of the computationally intensive work involved in Frame formatting and de-formatting and -  
when in receive mode - in searching for and synchronising onto the Frame Preamble. In normal operation the  
modem will only require servicing by the µC once per received or transmitted block.  
Thus, to transmit a block, the controlling µC has only to load the - unformatted - 'raw' binary data into the  
modem's Data Block Buffer then instruct the modem to format and transmit that data. The modem will then  
calculate and add the CRC bits as required, encode the result as 4-level symbols (with Forward Error  
Correction coding) and interleave the symbols before transmission.  
In receive mode, the modem can be instructed to assemble a block's worth of received symbols, de-interleave  
the symbols, translate them to binary - using the FEC coding to correct as many errors as possible - and  
check the resulting CRC before placing the received binary data into the Data Block Buffer for the µC to read.  
The modem can also transmit and receive un-formatted data using the T4S, T24S and R4S tasks described in  
sections 1.5.3 and 1.5.5.2. These are normally used for the transmission of Symbol and Frame  
Synchronisation sequences. They may also be used for the transmission and reception of special test patterns  
or even for special data formats - although in this case care should be taken to ensure that the transmitted  
signal contains enough level and timing information for the receiving modem's level and clock extraction  
circuits to function correctly (see section 1.6.3).  
ã 1997 Consumer Microcircuits Limited  
10  
D/929B/1