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FX839D5 参数 Datasheet PDF下载

FX839D5图片预览
型号: FX839D5
PDF下载: 下载PDF文件 查看货源
内容描述: 模拟控制接口 [Analogue Control Interface]
分类和应用: 电信集成电路电信电路光电二极管
文件页数/大小: 22 页 / 1141 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Analogue Control Interface  
FX839  
Write Only Register (8-Bit and 16-Bit)  
HEX  
ADDRESS/  
COMMAND  
REGISTER  
NAME  
BIT 7  
(D7)  
BIT 6  
(D6)  
BIT 5  
(D5)  
BIT 4  
(D4)  
BIT 3  
(D3)  
BIT 2  
(D2)  
BIT 1  
(D1)  
BIT 0  
(D0)  
$01  
$D0  
$D2  
RESET  
CLOCK/IRQ  
CONTROL  
N/A  
0
N/A  
0
N/A  
N/A  
0
N/A  
0
N/A  
N/A  
DIVIDER  
BIT 1  
N/A  
0
BIT 2  
MOD1  
BIT 2  
BIT 0  
BIT 0  
BIT 0  
0
VARIABLE  
ATTENUATOR (1)  
VARIABLE  
MOD1  
ENABLE  
MOD2  
0
0
BIT 4  
BIT 4  
0
BIT 3  
BIT 3  
BIT 1  
BIT 1  
MOD2  
BIT 2  
ATTENUATOR (2)  
0
0
ENABLE  
DAC  
CONTROL  
NBIT  
DAC1  
NBIT  
DAC2  
NBIT  
DAC3  
DAC1  
ENABLE  
DAC2  
ENABLE  
DAC3  
ENABLE  
$D3  
$D4  
DAC1 DATA  
(1)  
BIT 7  
0
BIT 6  
0
BIT 5  
0
BIT 4  
0
BIT 3  
0
BIT 2  
0
BIT 1  
BIT 9  
BIT 1  
BIT 9  
BIT 1  
BIT 9  
BIT 0  
BIT 8  
BIT 0  
BIT 8  
BIT 0  
BIT 8  
0
*See Note 1  
(2)  
DAC2 DATA  
(1)  
$D5  
$D6  
BIT 7  
0
BIT 6  
0
BIT 5  
0
BIT 4  
0
BIT 3  
0
BIT 2  
0
*See Note 1  
(2)  
DAC3 DATA  
(1)  
BIT 7  
0
BIT 6  
0
BIT 5  
0
BIT 4  
0
BIT 3  
0
BIT 2  
0
*See Note 1  
(2)  
ADC  
CONTROL  
ADCIN1  
ACTIVE  
ADCIN2  
ACTIVE  
ADCIN3  
ACTIVE  
ADCIN4  
ACTIVE  
$D7  
$D8  
0
1
READN  
MAG COMP ONE  
LEVELS (1)  
MAGNITUDE COMPARATOR UPPER LEVEL  
BIT 5 BIT 4 BIT 3 BIT 2  
MAGNITUDE COMPARATOR LOWER LEVEL  
BIT 5 BIT 4 BIT 3 BIT 2  
MAGNITUDE COMPARATOR UPPER LEVEL  
BIT 5 BIT 4 BIT 3 BIT 2  
MAGNITUDE COMPARATOR LOWER LEVEL  
BIT 5 BIT 4 BIT 3 BIT 2  
MAGNITUDE COMPARATOR UPPER LEVEL  
BIT 5 BIT 4 BIT 3 BIT 2  
MAGNITUDE COMPARATOR LOWER LEVEL  
BIT 5 BIT 4 BIT 3 BIT 2  
MAGNITUDE COMPARATOR UPPER LEVEL  
BIT 5 BIT 4 BIT 3 BIT 2  
MAGNITUDE COMPARATOR LOWER LEVEL  
BIT 5 BIT 4 BIT 3 BIT 2  
BIT 7  
BIT 7  
BIT 7  
BIT 7  
BIT 7  
BIT 7  
BIT 7  
BIT 7  
BIT 6  
BIT 6  
BIT 6  
BIT 6  
BIT 6  
BIT 6  
BIT 6  
BIT 6  
BIT 1  
BIT 1  
BIT 1  
BIT 1  
BIT 1  
BIT 1  
BIT 1  
BIT 1  
BIT 0  
BIT 0  
BIT 0  
BIT 0  
BIT 0  
BIT 0  
BIT 0  
BIT 0  
MAG COMP ONE  
LEVELS (2)  
MAG COMP TWO  
LEVELS (1)  
$D9  
$DA  
$DB  
MAG COMP TWO  
LEVELS (2)  
MAG COMP THREE  
LEVELS (1)  
MAG COMP THREE  
LEVELS (2)  
MAG COMP FOUR  
LEVELS (1)  
MAG COMP FOUR  
LEVELS (2)  
Note 1: A second byte is expected by the 'C-BUS' interface only when the 'NBIT DACn' bit of the 'DAC  
Control Register' is set high. Otherwise the data transfer is a single byte (Bit 7 to Bit 0).  
Consumer Microcircuits Limited  
9
1997  
D/839/4  
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