Codec Integration
FX619 PARAMETERS
MEASURED HERE
FX619 PARAMETERS
MEASURED HERE
REGULATED POWER
SUPPLY
EUROCOM
EUROCOM
FX619
FX619
ANALOGUE
INPUT
ANALOGUE
OUTPUT
INTERFACE
(BALUN
&
ENCODER
DECODER
EUROCOM
INPUT
EUROCOM
OUTPUT
INTERFACE
(BALUN
&
BUFFER)
BUFFER)
DATA
DATA
CLOCK MODE
16/32/64kb/s
CLOCKS
CLOCKS
1.024 MHz
1.024 MHz
SYNCHRONOUS CLOCK
AND
DATA SYSTEM
Fig.2 Eurocom System Configuration – showing the FX619, which with the indicated interfacing, will conform to
the Eurocom Basic Parameters Specification D1 – IA8.
Component
Unit Value
Note – with reference to Figure 3 (below)
R1
R2
C1
C2
C3
1M
Selectable
33p
Oscillator Inverter bias resistor.
Xtal Drive limiting resistor.
Xtal Circuit drain capacitor.
Xtal Circuit gate capacitor.
Encoder Input coupling capacitor – The drive source impedance to this
input should be less than 100Ω. Output Idle channel noise levels will
improve with an even lower source impedance.
Bias decoupling capacitor.
33p
1.0µ
C4
C5
X1
1.0µ
1.0µ
1.024 MHz
VDD decoupling capacitor.
A 1.024 MHz Xtal/clock input will yield exactly 16/32/64 kb/s data clock
rates. Xtal circuitry shown is in accordance with CML application note
D/XT/1 April 1986.
Tolerance :– Resistors ± 10% Capacitors ± 20%
VDD
XTAL/CLOCK
VDD
X 1
1
22
R1
CLOCK MODE 1
CLOCK MODE 2
XTAL
N/C
2
3
21
20
C2
C1
R2
ENCODER DATA CLOCK
ALGORITHM
4
19
18
17
16
15
14
13
12
DECODER DATA CLOCK
ENCODER OUTPUT
ENCODER FORCE IDLE
DATA ENABLE
5
C5
DECODER INPUT
DECODER FORCE IDLE
POWERSAVE
FX619J
6
7
N/C
8
N/C
BIAS
9
ENCODER INPUT
DECODER OUTPUT
10
11
C3
N/C
VSS
C4
VSS
Fig.3 Recommended External Components
4
CMLMICRO [ CML MICROCIRCUITS ]
