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CMX992Q3 参数 Datasheet PDF下载

CMX992Q3图片预览
型号: CMX992Q3
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, VQFN-48]
分类和应用: 电信电信集成电路
文件页数/大小: 56 页 / 1937 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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RF Quadrature Transceiver / RF Quadrature Receiver  
CMX991/CMX992  
5.5  
VBIAS  
The VBIAS pin provides a 1.6V bandgap reference-derived bias voltage (VBIAS) that may be used as a  
reference voltage for differential amplifier stages (e.g. in the receiver output). The VBIAS pin can be  
decoupled to ground but a capacitor greater than 200nF should be used to ensure stability.  
5.6  
Data Interface  
The CMX991/CMX992 is controlled via a three wire C-BUS. A fourth pin (RDATA) is required if register  
read-back is to be used. A further pin (RESETN) is provided which, when ‘low’, generates a reset signal  
(see section for 6.1 further details). The pin should be pulled to the VDDIO supply with a suitable resistor if  
not used.  
The data interface can run at a lower voltage than the rest of the IC by setting the VDDIO supply to the  
required interface voltage, in the range 1.6V to 3.6V.  
Full details of the control register structure are given in section 6.  
2012 CML Microsystems Plc  
24  
D/991_992/18  
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