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CMX992Q3 参数 Datasheet PDF下载

CMX992Q3图片预览
型号: CMX992Q3
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, VQFN-48]
分类和应用: 电信电信集成电路
文件页数/大小: 56 页 / 1937 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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RF Quadrature Transceiver / RF Quadrature Receiver  
CMX991/CMX992  
5.3.2 Direct I/Q IF Output Tx Mode  
As shown in Figure 16, the filtered TxIF output from the I/Q modulator can be made available on the  
TXIFOUT pin. This can then be translated up to RF frequency via user-supplied external circuits or in  
some cases used directly for VHF operation. When this mode is selected the image-reject up-converter  
should be powersaved (register $14, b6 see section 6.5.1): this disables unused circuits and saves  
power.  
5.4  
Local Oscillators  
5.4.1 IF Local Oscillator  
The CMX991/CMX992 provides an integer-N PLL that can be used to create the IF Local oscillator, see  
Figure 17. The CMX991/CMX992 provides a VCO negative resistance amplifier, so only a tank circuit  
needs to be implemented externally. Alternatively, this amplifier can be bypassed and an external VCO can  
be used in the range 40 to 600 MHz (NB: see note at end of section 4.5).  
LO to I/Q Rx mixers  
CMX991  
(and Tx IF section in  
CMX991)  
CMX992  
VCO  
NR  
Amplifier  
N Divider  
(Feedback)  
80 - 32767  
M Divider  
(Reference)  
2 - 8191  
FREF  
NR  
Control  
Enable  
VCO  
Output  
Buffer  
Phase  
Detector  
Lock  
Detect  
Enable  
VCOP  
VCON  
DOIF  
VCO  
Tank &  
Varactors  
Figure 17 CMX991/CMX992 IF Local Oscillator  
The integer-n PLL has programmable M and N dividers as shown in Figure 17. The phase detector  
provides a charge pump output which requires a suitable loop filter to convert this signal into a control  
voltage for a VCO. The phase detector can be turned off (high impedance mode) and the PLL section  
disabled if an external LO is to be used, see section 6.8 for control details. In the case of an external LO it  
is necessary for the VCO Output buffer to remain enabled (section 6.2, register $11, b1) however the VCO  
amplifier must be disabled (Register $11, b0).  
The output frequency of the PLL is set by the following calculation:  
2012 CML Microsystems Plc  
22  
D/991_992/18  
 
 
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