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CMX971 参数 Datasheet PDF下载

CMX971图片预览
型号: CMX971
PDF下载: 下载PDF文件 查看货源
内容描述: [Small 16-lead VQFN Package]
分类和应用:
文件页数/大小: 25 页 / 1123 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Quadrature Modulator  
CMX971  
7
Direct Control Option  
As an alternative to the C-BUS method of controlling the device, the CMX971 has the option of using a  
direct method to control some of the device settings. This is particularly useful in systems that do not  
require a microcontroller. The settings are limited to being able to reset the device, set the LO divider to  
LO/2 or LO/4 and set the LO path frequency setting to 1 of 4 values to minimise quadrature error (see  
section 6.3.1).  
The Direct Control Option is selected by holding the CBUSOFFN pin low. This changes the function of the  
C-BUS pins (CDATA, SCLK, RDATA and CSN) to those defined in Table 2 (these are FREQ1, RESETN,  
DIVSET and FREQ2 respectively). Other register settings adopt a default value. Note that the FREQ1 and  
FREQ2 pins have no frequency-dependent properties.  
The device behaviour with CBUSOFFN = 0 is as follows:  
RESETN, if asserted by taking the pin low, behaves like a C-BUS General Reset in that all registers will go  
to an all zero state and the device will go into a low power mode.  
When RESETN is de-asserted (taken high) the device comes out of low power mode and enters its active  
state. In the active state the FREQ1, RESETN, DIVSET and FREQ2 pins have the following functionality.  
Function  
Pin at VDD  
Active mode  
Divide by 4  
Pin at VSS  
Low power mode, device reset  
Divide by 2  
RESETN  
DIVSET  
The FREQ1 and FREQ2 pins are decoded so as to give four values at which the quadrature accuracy is  
optimised. This is important in the LO divide-by-2 mode if the input oscillator mark-space ratio is not  
sufficiently close to 1. The value is a guide only see section 6.3.1. The best intermodulation performance  
is achieved at the lowest setting (‘00’) and the best wideband noise can be achieved at the highest setting  
(‘11’).  
FREQ1  
FREQ2  
0
1
0
1
0
0
1
1
best intermodulation  
intermediate value  
intermediate value  
best wideband noise  
The C-BUS registers will be automatically configured as follows:  
General Control Register:  
C-BUS address $1B  
b7  
0
b6  
TXDIV  
See  
b5  
0
b4  
ENBIAS  
1
b3  
0
b2  
0
b1  
0
b0  
TXEN  
1
below  
If DIVSET is low, b6 = 1 and the LO is divided by 2  
If DIVSET is high, b6 = 0 and the LO is divided by 4  
2015 CML Microsystems Plc  
13  
D/971/4