Quadrature Modulator
CMX971
6.2
General Control Register
8-bit write-only
6.2.1 General Control Register:
C-BUS address $1B
This register controls general features such as powersave.
All bits of this register are cleared to ‘0’ during a General Reset command.
Note:
b0 (TXEN) and b4 (ENBIAS) are high if pin CBUSOFFN is low.
7
0
6
5
0
4
3
0
2
0
1
0
0
Bit:
TXDIV
ENBIAS
TXEN
General Control Register b6, b4 and b0
Writing b6 = ’1’ the LO is divided by 2; writing b6 = ’0’ the LO is divided by 4.
Writing b4 = ‘1’ Enables the internal bias current supplies.
Writing b0 = ‘1’ Enables the quadrature modulator
All other bits are reserved and must be set to ‘0’ for correct operation.
6.2.2 General Control Register
8-bit read-only
C-BUS address $EB
This register reads the value in register $1B, see section 6.2.1 for details of bit functions.
6.3
Control Register
6.3.1 Control Register:
8-bit write-only
C-BUS address $1E
This register controls transmitter features.
All bits of this register are cleared to ‘0’ by a General Reset command.
7
0
6
0
5
0
4
0
3
2
1
0
Bit:
F3
F2
F1
F0
Control Register b7 – b4
These bits are reserved and must be set to ‘0’ for correct operation.
Control Register b3 - b0
These bits optimise the performance of the Transmitter LO path. The best intermodulation
performance is achieved at the lowest control setting (‘0000’) and the best wideband noise can be
achieved at the highest setting (‘1111’).
2015 CML Microsystems Plc
11
D/971/4
CMLMICRO [ CML MICROCIRCUITS ]
