GMSK Packet Data Modem
CMX909B
1.5.4
The Programmer’s View
The modem appears to the programmer as 4 write only 8-bit registers shadowed by 3 read only
registers, individual registers being selected by the A0 and A1 chip inputs:
A1
0
A0
0
Write to Modem
Data Buffer
Read from Modem
Data Buffer
0
1
1
1
0
1
Command Register
Control Register
Mode Register
Status Register
Data Quality Register
not used
1.5.4.1 Data Buffer
This is an 18-byte read/write buffer which is used to transfer data (as opposed to command, status,
mode, data quality and control information) between the modem and the host µC.
It appears to the µC as a single 8-bit register; the modem ensuring that sequential µC reads or
writes to the buffer are routed to the correct locations within the buffer.
The µC should only access this buffer when the Status Register BFREE (Buffer Free) bit is ‘1’.
The buffer should only be written to while in Tx mode and read from while in Rx mode (except when
loading Frame Sync detection bytes while in Rx mode).
1.5.4.2 Command Register
Writing to this register tells the modem to perform a specific action or actions, depending on the
setting of the TASK, AQLEV and AQBC bits. The ENV and EOP bits are used to indicate the
presence of signals in the receive path.
When it has no action to perform (but is not ‘powersaved’), the modem will be in an ‘idle’ state. If the
modem is in transmit mode the input to the Tx filter will be connected to V . In receive mode the
BIAS
modem will continue to measure the received data quality and extract bits from the received signal,
supplying them to the de-interleave buffer, but will otherwise ignore the received data.
ã 2001 Consumer Microcircuits Limited
14
D/909B/1