Low Power V.32 bis Modem
CMX869
6.8
Status Register
Status Register: 16-bit read-only.
C-BUS address $E6
Bits 13-0 of this register are cleared to 0 by a General Reset command or when b7 (Reset) of the General
Control Register is 1, or while b8 (Power-Up) of the General Control Register is 0.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit:
IRQ
RD
PF
TxD TxU
See below for uses of these bits
The meanings of the Status Register bits 10-0 depend on the receive mode.
Status Register bits 15-11: All modes
IRQ
Mask bit
b6
b15
b14
b13
b12
b11
IRQ.
Set to 1 on Ring Detect
Programming Flag bit. See 6.10
Set to 1 on Tx data ready. Cleared by write to Tx Data Register
Set to 1 on Tx data underflow. Cleared by write to Tx Data Register
b5
b4
b3
b3
Status Register bits 10-0: Rx Tones Detect modes
IRQ
Mask bit
b10
Set to 1 when energy is detected in Call Progress band or when both
b2
programmable tones are detected
b9
b8
b7
0
0
b1
b1
b1
Set to 1 when 2100Hz answer tone or when the second programmable
tone is detected
b6
Set to 1 when 2225Hz answer tone or when the first programmable tone is
b0
detected
b5
b4
b3
b2
b1
b0
Set to 1 when DTMF code is detected
0
Rx DTMF code b3, see table following
Rx DTMF code b2
Rx DTMF code b1
Rx DTMF code b0
b0
-
-
-
-
-
Status Register bits 10-7: Rx FSK Modem modes
IRQ
Mask bit
b2
b10
b9
1 while energy is detected in Rx modem signal band
1 while ‘1010..’ pattern is detected
1 while continuous 0s detected
b1
b1
b8
b7
1 while continuous 1s detected
b1
Status Register bits 10-7: QAM Modem (V.22, V.22 bis, V.32, V.32 bis) modes
IRQ
Mask bit
b10
b9
0
b2
b1
Set to 1 by modem event. Cleared by read of QAM modem Status
Register
b8
b7
Set to 1 when V.14 ‘break’ signal from remote modem detected in Start-
Stop mode
0
b1
b1
© 2004 CML Microsystems Plc
30
D/869/4
CMLMICRO [ CML MICROCIRCUITS ]
