Low Power V.32 bis Modem
CMX869
Synchronous mode
In Synchronous mode the received data bits are all fed into an internal Rx Data Buffer which is copied into
the C-BUS Rx Data Register after every 8 or 16 bits, depending on the setting of the General Control
Register ‘2 character mode’ bit, b10.
Start-Stop (asynchronous) mode
In Start-Stop mode the USART Control logic looks for the start of each character, then feeds only the
required number of data bits (not parity) into an internal Rx Data Buffer. If the parity bit is used, both parity
and the presence of a Stop bit are checked. Depending on the setting of b10 of the General Control
Register, the data bits from 1 or 2 received characters are placed into the C-BUS Rx Data Register. If
parity has been enabled the C-BUS Status Register ‘Even Parity’ bit(s) are set or cleared according to the
received parity.
If the Stop bit is missing at the end of a character (a ‘0’ received instead of a ‘1’) the received character will
still be placed into the C-BUS Rx Data Register, the Status Register Rx Framing Error bit will be set to ‘1’
and the USART will re-synchronise onto the next ‘1’ – ‘0’ (Stop – Start) transition.
If 2-character mode has been selected, received characters will normally be transferred to the C-BUS Rx
Data Register two at a time and the Status Register b1 set to 1. However, the USART includes a time-out
function so that if a message contains an odd number of characters the final character will be transferred
to the Rx Data Register and b1 of the Status Register will be cleared to ‘0’. This indicates that the next
data to be read from the Rx Data Register holds the single last character in the least significant byte.
Figure 7 Rx USART (in 16 Bit Mode)
© 2004 CML Microsystems Plc
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