FSK Modem and DTMF Codec
CMX865
C-BUS Timings (See Figure 13)
Notes
Min.
Typ.
Max.
Units
tCSE
tCSH
tLOZ
CSN-Enable to Clock-High time
100
-
-
ns
Last Clock-High to CSN-High time
100
0.0
-
-
-
-
ns
ns
Clock-Low to Reply Output enable
time
tHIZ
CSN-High to Reply Output 3-state time
CSN-High Time between transactions
Inter-Byte Time
-
-
-
-
-
-
-
-
-
-
-
1.0
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
tCSOFF
tNXT
tCK
1.0
-
-
-
-
-
-
-
-
-
200
200
100
100
75.0
25.0
50.0
0.0
Clock-Cycle time
tCH
Serial Clock-High time
tCL
Serial Clock-Low time
tCDS
tCDH
tRDS
tRDH
Command Data Set-Up time
Command Data Hold time
Reply Data Set-Up time
Reply Data Hold time
Maximum 30pF load on each C-BUS interface line.
Note: These timings are for the latest version of the C-BUS as embodied in the CMX865.
Figure 13 C-BUS Timing
© 2005 CML Microsystems Plc
40
D/865/3
CMLMICRO [ CML MICROCIRCUITS ]
