FSK Modem and DTMF Codec
CMX865
Figure 9a Operation of Status Register b10-5
The IRQN output pin will be pulled low (to VSS) when the IRQ bit of the Status Register and the
IRQNEN b6 of the General Control Register are both 1.
Changes to Status Register bits caused by a change of Tx or Rx operating mode can take up to
150µs to take effect.
In powersave mode or when the reset bit of the General Control Register is 1, the Ring Detect bit
continues to operate.
In Rx modem modes b2-1 will be zero and b0 will show the output of the frequency demodulator,
updated at 8 times the nominal data rate.
Figure 9b Operation of Status Register in DTMF Rx Mode
© 2005 CML Microsystems Plc
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D/865/3
CMLMICRO [ CML MICROCIRCUITS ]
