FSK Modem and DTMF Codec
CMX865
Notes:
I/P
O/P
BI
T/S
NC
=
=
=
=
=
Input
Output
Bidirectional
3-state Output
No Connection
4.
External Components
R1
X1
C1, C2
C3, C4
C5
22pF
100nF
10uF
68kΩ
11.0592MHz
or 12.288MHz
Resistors ±5%, capacitors ±20% unless otherwise stated.
Figure 2 Recommended External Components for a Typical Application
This device is capable of detecting and decoding small amplitude signals. To achieve this, VDD and VBIAS
should be decoupled and the receive path protected from extraneous in-band signals. It is recommended
that the printed circuit board is laid out with a VSS ground plane in the CMX865 area to provide a low
impedance connection between the VSS pins and the VDD and VBIAS decoupling capacitors. The VSS
connections to the Xtal oscillator capacitors C1 and C2 should also be low impedance and preferably be
part of the VSS ground plane to ensure reliable start up of the oscillator.
For best results, an Xtal oscillator design should drive the clock inverter input with signal levels of at least
40% of VDD peak-to-peak. Tuning-fork Xtals generally cannot meet this requirement. To obtain Xtal
oscillator design assistance, please consult your Xtal manufacturer.
© 2005 CML Microsystems Plc
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D/865/3