FSK Modem and DTMF Codec
CMX865
3.
Signal List
CMX865D2
Signal
Name
Description
Pin No.
Type
XTALN
XTAL/CLOCK
RDRVN
O/P
The output of the on-chip Xtal oscillator inverter.
1
I/P
2
3
The input to the oscillator inverter from the Xtal
circuit or external clock source.
Relay drive output, low resistance pull down to
VSS when active and medium resistance pull up
to VDD when inactive.
O/P
VSS
RD
Power
I/P
4, 8, 12, 17, 21
5
The negative supply rail (ground).
Schmitt trigger input to the Ring signal detector.
Connect to VSS if Ring Detector not used.
Open drain output and Schmitt trigger input
forming part of the Ring signal detector. Connect
to VDD if Ring Detector not used.
RT
BI
6
VDD
Power The positive supply rail. Levels and thresholds
within the device are proportional to this voltage.
7, 16, 24
RXAFB
RXAN
RXA
O/P
The output of the Rx Input Amplifier.
9
I/P
10
11
13
The inverting input to the Rx Input Amplifier
The non-inverting input to the Rx Input Amplifier
I/P
VBIAS
O/P
Internally
generated
bias
voltage
of
approximately VDD /2, except when the device is
in ‘Powersave’ mode when VBIAS will discharge
to VSS. Should be decoupled to VSS by a
capacitor mounted close to the device pins.
The inverted output of the Tx Output Buffer.
TXAN
TXA
O/P
O/P
I/P
14
15
18
19
The non-inverted output of the Tx Output Buffer.
The C-BUS chip select input from the µC.
The C-BUS serial data input from the µC.
CSN
COMMAND
DATA
I/P
SERIAL
CLOCK
I/P
20
22
The C-BUS serial clock input from the µC.
REPLY DATA
T/S
A 3-state C-BUS serial data output to the µC.
This output is high impedance when not sending
data to the µC.
IRQN
O/P
23
A ‘wire-ORable’ output for connection to a µC
Interrupt Request input. This output is pulled
down to VSS when active and is high impedance
when inactive. An external pullup resistor is
required i.e. R1 of Figure 2.
© 2005 CML Microsystems Plc
4
D/865/3