FSK Modem and DTMF Codec
CMX865
If the µC has not read the previous data from the Rx Data Register by the time that new data is copied to
it from the Rx Data Buffer then the Rx Data Overflow flag bit of the Status Register will be set to 1.
The Rx Data Ready flag and Rx Data Overflow bits are cleared to 0 when the Rx Data Register is read by
the µC.
A received character which has all bits ‘0’, including the Stop and any Parity bits, will always cause the Rx
Framing Error bit to be set and the USART to re-synchronise onto the next ‘1’ – ‘0’ transition. Additionally
the received Continuous 0s detector will respond when more than 2M + 3 consecutive ‘0’s are received,
where ‘M’ is the selected total number of bits per character including Stop and any Parity bits.
5.10
C-BUS Interface
This block provides for the transfer of data and control or status information between the CMX865’s
internal registers and the µC over the C-BUS serial bus. Each transaction consists of a single Register
Address byte sent from the µC which may be followed by a one or more data byte(s) sent from the µC to
be written into one of the CMX865’s Write Only Registers, or a one or more byte(s) of data read out from
one of the CMX865’s Read Only Registers, as illustrated in Figure 8.
Data sent from the µC on the Command Data line is clocked into the CMX865 on the rising edge of the
Serial Clock input. Reply Data sent from the CMX865 to the µC is valid when the Serial Clock is high.
The CSN line must be held low during a data transfer and kept high between transfers. The C-BUS
interface is compatible with most common µC serial interfaces and may also be easily implemented with
general purpose µC I/O pins controlled by a simple software routine. Figure 13 gives detailed C-BUS
timing requirements.
The following C-BUS addresses and registers are used by the CMX865:
General Reset Command (address only, no data).
General Control Register, 16-bit write only.
Transmit Mode Register, 16-bit write-only.
Receive Mode Register, 16-bit write-only.
Transmit Data Register, 8-bit write only.
Receive Data Register, 8-bit read-only.
Status Register, 16-bit read-only.
Address $01
Address $E0
Address $E1
Address $E2
Address $E3
Address $E5
Address $E6
Address $E8
Programming Register, 16-bit write-only.
Note: The C-BUS addresses $E9, $EA and $EB are allocated for production testing and should not be
accessed in normal operation.
5.10.1 General Reset Command
General Reset Command
(no data)
C-BUS address $01
This command resets the device and clears all bits of the General Control, Transmit Mode and Receive
Mode Registers and b15 and b13-0 of the Status Register.
Whenever power is applied to the CMX865, a General Reset command should be sent to the device, after
which the General Control Register should be set as required.
© 2005 CML Microsystems Plc
16
D/865/3
CMLMICRO [ CML MICROCIRCUITS ]
